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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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IMX7DCEC датащи(PDF) 92 Page - NXP Semiconductors |
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IMX7DCEC датащи(HTML) 92 Page - NXP Semiconductors |
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92 / 161 page  Electrical characteristics i.MX 7Dual Family of Applications Processors Datasheet, Rev. 7, 09/2023 NXP Semiconductors 92 4.10.3.2 RMII mode timing In RMII mode, ENET_CLK is used as the REF_CLK, which is a 50 MHz ± 50 ppm continuous reference clock. ENET_RX_EN is used as the ENET_RX_EN in RMII. Other signals under RMII mode include ENET_TX_EN, ENET_TX_DATA[1:0], ENET_RX_DATA[1:0] and ENET_RX_ER. Figure 55 shows RMII mode timings. Table 70 describes the timing parameters (M16–M21) shown in the figure. Figure 55. RMII mode signal timing diagram Table 69. MII serial management channel timing ID Characteristic Min. Max. Unit M10 ENET_MDC falling edge to ENET_MDIO output invalid (min. propagation delay) 0 — ns M11 ENET_MDC falling edge to ENET_MDIO output valid (max. propagation delay) — 5 ns M12 ENET_MDIO (input) to ENET_MDC rising edge setup 18 — ns M13 ENET_MDIO (input) to ENET_MDC rising edge hold 0 — ns M14 ENET_MDC pulse width high 40% 60% ENET_MDC period M15 ENET_MDC pulse width low 40% 60% ENET_MDC period ENET_CLK (input) ENET_TX_EN M16 M17 M18 M19 M20 M21 ENET_RX_DATA[1:0] ENET_TX_DATA (output) ENET_RX_ER ENET_RX_EN (input) |
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