IMX7DCEC datasheet(64/161 Pages) NXP

64 / 161 page

Electrical characteristics

i.MX 7Dual Family of Applications Processors Datasheet, Rev. 7, 09/2023

NXP Semiconductors

WE38

EIM_EBx_B Invalid to

EIM_CSx_B Invalid (Read

access)

WE7 – WE13 + (RBEN –

RCSN)

—

3 – (RBEN– RCSN)

WE39

EIM_CSx_B Valid to

EIM_LBA_B Valid

WE14 – WE6 + (ADVA – CSA)

—

3 + (ADVA – CSA)

WE40

EIM_LBA_B Invalid to

EIM_CSx_B Invalid (ADVL is

asserted)

WE7 – WE15 – CSN

—

3 – CSN

WE40A

(muxed

A/D)

EIM_CSx_B Valid to

EIM_LBA_B Invalid

WE14 – WE6 + (ADVN + ADVA

+ 1 – CSA)

–3 + (ADVN +

ADVA + 1 – CSA)

3 + (ADVN + ADVA +

1 – CSA)

WE41

EIM_CSx_B Valid to Output

Data Valid

WE16 – WE6 – WCSA

—

3 – WCSA

WE41A

(muxed

A/D)

EIM_CSx_B Valid to Output

Data Valid

WE16 – WE6 + (WADVN +

WADVA + ADH + 1 – WCSA)

—

3 + (WADVN +

WADVA + ADH + 1 –

WCSA)

WE42

Output Data Invalid to

EIM_CSx_B Invalid

WE17 – WE7 – CSN

—

3 – CSN

MAXCO Output maximum delay from

internal driving

EIM_ADDRxx/control FFs to

chip outputs

—

MAXCSO Output maximum delay from

CSx internal driving FFs to CSx

out

—

MAXDI

EIM_DATAxx maximum delay

from chip input data to its

internal FF

—

WE43

Input Data Valid to EIM_CSx_B

Invalid

MAXCO – MAXCSO + MAXDI

MAXCO –

MAXCSO +

MAXDI

—

WE44

EIM_CSx_B Invalid to Input

Data invalid

—

WE45

EIM_CSx_B Valid to

EIM_EBx_B Valid (Write

access)

WE12 – WE6 + (WBEA –

WCSA)

—

3 + (WBEA – WCSA)

WE46

EIM_EBx_B Invalid to

EIM_CSx_B Invalid (Write

access)

WE7 – WE13 + (WBEN –

WCSN)

—

–3 + (WBEN –

WCSN)

Table 46. EIM asynchronous timing parameters table relative chip to select(continued)

Ref No.

Parameter

Determination by

Synchronous measured

parameters1

Min

Max

Unit

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