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PSD4235G2V-10UI датащи(PDF) 48 Page - STMicroelectronics |
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PSD4235G2V-10UI датащи(HTML) 48 Page - STMicroelectronics |
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48 / 100 page ![]() PSD4256G6V 48/100 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. PSD Interface to a Multiplexed Bus Figure 19 shows an example of a system using an MCU with a multiplexed bus and a PSD4256G6V. The ADIO port on the PSD is connected directly to the MCU address/data bus. Address Strobe (ALE/ AS, PD0) latches the address signals internally. Latched addresses can be brought out to Port E, F or G. The PSD drives the ADIO data bus only when one of its internal resources is accessed and READ Strobe (RD, CNTL1) is active. Should the system address bus exceed sixteen bits, Ports A, B, C, or F may be used as additional address in- puts. Figure 19. An Example of a Typical Multiplexed Bus Interface Note: 1. AD[15:8] is for 16-bit MCU MCU WR RD BHE ALE RESET AD [ 7:0] AD[15:8]1 A[ 15: 8] A[ 7: 0] ADIO PORT PORT F PORT G PORT A WR (CNTRL0) RD (CNTRL1) BHE (CNTRL2) RST ALE (PD0) PORT D (OPTIONAL) (OPTIONAL) PSD AI04928B A[ 23:16] (OPTIONAL) or A[15:8] |
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