PSD4235G2V-10UI datasheet(31/100 Pages) STMICROELECTRONICS

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PSD4256G6V

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

PROGRAMMING FLASH MEMORY

Flash memory must be erased prior to being pro-

grammed. The MCU may erase Flash memory all

at once or by-sector. Although erasing Flash mem-

ory occurs on a sector or device basis, program-

ming Flash memory occurs on a word basis.

The primary and secondary Flash memories re-

quire the MCU to send an instruction to program a

word or to erase sectors (see Table 29, page 27).

Once the MCU issues a Flash memory Program or

Erase instruction, it must check the status bits for

completion. The embedded algorithms that are in-

voked inside the PSD support several means to

provide status to the MCU. Status may be checked

using any of three methods: Data Polling, Data

Toggle, or Ready/Busy (PE4) signal.

Data Polling

Polling on the Data Polling Bit (DQ7/DQ15) is a

method of checking whether a Program or Erase

cycle is in progress or has completed. Figure 6

shows the Data Polling algorithm.

When the MCU issues a Program instruction, the

embedded algorithm within the PSD begins. The

MCU then reads the location of the word to be pro-

grammed in Flash memory to check the status.

The Data Polling Bit (DQ7/DQ15) becomes the

complement of the corresponding bit of the original

data word to be programmed. The MCU continues

to poll this location, comparing data and monitor-

ing the Error Flag Bit (DQ5/DQ13). When the Data

Polling Bit (DQ7/DQ15) matches the correspond-

ing bit of the original data, and the Error Flag Bit

(DQ5/DQ13) remains ’0,’ the embedded algorithm

is complete. If the Error Flag Bit (DQ5/DQ13) is ’1,’

the MCU should test the Data Polling Bit (DQ7/

DQ15) again since the Data Polling Bit (DQ7/

DQ15) may have changed simultaneously with the

Error Flag Bit (DQ5/DQ13) (see Figure 6).

The Error Flag Bit (DQ5/DQ13) is set if either an

internal time-out occurred while the embedded al-

gorithm attempted to program the location or if the

MCU attempted to program a ’1’ to a bit that was

not erased (not erased is logic ’0’).

It is suggested (as with all Flash memories) to read

the location again after the embedded program-

ming algorithm has completed, to compare the

word that was written to the Flash memory with the

word that was intended to be written.

When using the Data Polling method during an

Erase cycle, Figure 6 still applies. However, the

Data Polling Bit (DQ7/DQ15) is ’0’ until the Erase

cycle is complete. A ’1’ on the Error Flag Bit (DQ5/

DQ13) indicates a time-out condition on the Erase

cycle, a 0 indicates no error. The MCU can read

any even location within the sector being erased to

get the Data Polling Bit (DQ7/DQ15) and the Error

Flag Bit (DQ5/DQ13).

PSDsoft generates ANSI C code functions that im-

plement these Data Polling algorithms.

Figure 6. Data Polling Flowchart

READ DQ5 and DQ7

(DQ13 and DQ15)

at Valid Even Address

START

READ DQ7

(DQ15)

Program

or Erase

Cycle failed

Program

or Erase

Cycle is

complete

AI04920

Yes

DQ5

(DQ13)

= 1

DQ7

(DQ15)

Data7

(Data15)

Yes

Issue RESET

instruction

DQ7

(DQ15)

Data7

(Data15)

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