ADPD6000 datasheet(23/89 Pages) AD

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Data Sheet

ADPD6000

THEORY OF OPERATION

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Rev. 0 | 23 of 89

CLOCKING

Low Frequency Oscillator

A low frequency oscillator clocks the low speed state machine,

which sets the time base used to control the sample timing, wake-

up states, and overall operation. There are three options for low

frequency oscillator generation. The first option is an internal 960

kHz oscillator. The second option is for the host to provide a low

frequency oscillator externally. Finally, the low frequency oscillator

can be generated by a divide by 32 of an external high frequency

clock source at 32 MHz. When powering up the device, it is expect-

ed that the low frequency oscillator be enabled and left running

continuously.

To operate with the on-chip low frequency oscillator, use the follow-

ing writes. Set the OSC_960K_EN bit to 1 to turn on the internal

oscillator. The internal 960 kHz clock frequency is set using the

10-bit OSC_960K_FREQ_ADJ bits.

If higher timing precision is required than can be provided by the

on-chip low frequency oscillator, the low frequency oscillator can

be driven directly from an external source provided on a GPIOx

input. To enable an external low frequency clock, use the following

writes. Enable one of the GPIOx inputs using the GPIO_PIN_CFGx

bits. Next, use the ALT_CLK_GPIO bits to choose the enabled

GPIOx input to be used for the external low frequency oscillator. Set

the ALT_CLOCKS bits to 0x1 to select an external low frequency

oscillator.

In a third method, an external 32 MHz clock is used for both the

high frequency clock and to be divided down to generate the low

frequency clock. To use this method, follow the previous instruc-

tions for an external low frequency clock but set the ALT_CLOCKS

bits to 0x3, and a divide by 32 used to generate the low frequency

clock so that a 1 MHz clock is generated from the external 32 MHz

clock.

High Frequency Oscillator

A 32 MHz high frequency oscillator is generated internally or can

be provided externally. This high frequency clock clocks the high

speed state machine, which controls the AFE operations during the

time slots, such as LED timing, integration times, and BIA excitation

frequency.

The high frequency oscillator can be internally generated by setting

the ALT_CLOCKS bits to 0x0 or 0x1. When selected, the internal

32 MHz oscillator is enabled automatically by the low speed state

machine during the appropriate wake-up time or during the 32 MHz

oscillator calibration routine.

The high frequency oscillator can also be driven from an external

source. To provide an external 32 MHz high frequency oscillator,

enable one of the GPIO inputs using the GPIO_PIN_CFGx bits.

Then, use the ALT_CLK_GPIO bits to choose the enabled GPIOx

input for the external high frequency oscillator. Finally, write 0x2 or

0x3 to the ALT_CLOCKS bits to select an external high frequency

oscillator. Writing 0x2 provides only the high frequency oscillator

from the external source, whereas writing 0x3 generates both the

low frequency oscillator and high frequency oscillator from the

external 32 MHz source. When using an external 32 MHz oscillator,

it must be kept running continuously for proper device operation.

TIME STAMP OPERATION

The time stamp feature is useful for calibrating the low frequency

oscillator as well as providing the host with timing information

during time slot operation. Timestamping is supported by the use

of any GPIO as a time stamp request input, the CAPTURE_TIME-

STAMP bit to enable capture of the time stamp trigger, a time

counter running in the low frequency oscillator domain, and two

output registers. The output bits include TIMESTAMP_COUNT_x,

which holds the number of low frequency oscillator cycles between

time stamp triggers, and TIMESTAMP_SLOT_DELTA, which holds

the number of low frequency oscillator cycles remaining to the next

time slot start.

The setup for using the time stamp operation is as follows:

1. Set OSC_CAL_ENABLE = 1 to enable the oscillator calibration

circuitry.

2. Configure a GPIO to support the time stamp input using the

appropriate GPIO_PIN_CFG_x bits. Select the matching GPIOx

to provide the time stamp using the TIMESTAMP_ GPIO bits.

3. Configure the ADPD6000 for operation and enable the low

frequency oscillator.

4. If the TIMESTAMP_SLOT_DELTA function is desired, start the

time slot operation by placing the device in go mode using

the OP_MODE bit (see Table 12). For low frequency oscillator

calibration, it is only required that the low frequency oscillator

is enabled. The device does not have to be in go mode for low

frequency oscillator calibration.

Use the following procedure to capture the time stamp:

1. Set the CAPTURE_TIMESTAMP bit to 1 to enable the capture

of the time stamp on the next rising edge of the selected GPIOx

input.

2. The host provides the initial time stamp trigger on the selected

GPIOx at an appropriate time.

3. The CAPTURE_TIMESTAMP bit is cleared when the timestamp

signal is captured unless the TIMESTAMP_ ALWAYS_EN bit

is set, in which case, the capture of the time stamp is always

enabled. Reenable the capture if necessary.

4. The host provides a subsequent time stamp trigger on the

selected GPIO at an appropriate time.

5. The number of low frequency oscillator cycles that occurred

between time stamp triggers can be read from the TIME-

STAMP_COUNT_x bits.

The host must continue to handle the FIFO data normally during

time stamp processing.

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