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ADPD6000 датащи(PDF) 30 Page - Analog Devices

номер детали ADPD6000
подробное описание детали  Multimodal Sensor Front End
PDF  89 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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ADPD6000 датащи(HTML) 30 Page - Analog Devices

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Data Sheet
ADPD6000
APPLICATIONS INFORMATION
analog.com
Rev. 0 | 30 of 89
When collecting the lit data with the LIT_OFFSET_A bit changing,
the data is lower than 16384 (unsaturated).
Figure 44. Timing of CT_DBLP3112 (Green LED)
ECG PATH
Figure 45 shows a typical connection diagram for the three-elec-
trode ECG application. Figure 45 captures the external components
required around ADPD6000, including current limitation resistors
for the ECG channel. These component values were designed
by users considering the maximum current of every channel. For
example, it is suggested to use 51 kΩ, 51 kΩ, and 330 kΩ on the
ECGIP, ECGIN, and RLD channels, respectively, for reference.
The signal data for ECG measurement that is read from FIFO
follows Equation 9:
Signal = VINVResolution+8,388,608  LSB (9)
Note that 8,388,608 is the center code of the ADC.
Table 16 shows the relevant register settings for the basic ECG
measurement.
Figure 45. System Overview of ECG Circuit Showing ECG Channel Protection and External Components Requirements
Table 16. Relevant Settings for ECG Measurement
Group
Register Address
Bit Field Name
Description
ECG_ANA_CTRL
0x0100, Bit 10
ECG_INP_CONNECT
ECG input connection. Set 1 to connect the ECG inputs.
0x0100, Bit 8
ECG_CHAN_RESOLUTION
Set to 0 for 286 nV/LSB, and set to 1 for 572 nV/LSB.
0x0100, Bits[5:4]
ECG_RLD_OUT_SEL
Set to 0x3 to set regulated common-mode input.
0x0100, Bit 3
ECG_RLD_SAT_EN
Set to 1 to enable DCLO for RLD.
0x0100, Bits[2:1]
ECG_RLD_SAT_THRESHOLD
Select the DCLO threshold for RLD.
0x0100, Bit 0
ECG_RLD_EN
Set to 1 to enable RLD.
ECG_LEADOFF_CTRL
0x0101, Bit 15
ECG_ACLO_EN
Set to 1 to enable the ACLO detector for the ECG inputs.
0x0101, Bits[14:12] ECG_ACLO_MAG
Select the ACLO excite current magnitude.
0x0101, Bits[11:9]
ECG_ACLO_THRESHOLD
Select ACLO threshold for the ECG inputs.
0x0101, Bit 8
ECG_DCLO_EN
Set to 1 to enable the DCLO detector for the ECG inputs.
0x0101, Bits[7:4]
ECG_DCLO_MAG
Select the DCLO excite current magnitude.
0x0101, Bit 3
ECG_DCLO_POLARITY_IN
Select DCLO output current polarity at ECGIN.
0x0101, Bit 2
ECG_DCLO_POLARITY_IP
Select DCLO output current polarity at ECGIP.
0x0101, Bits[1:0]
ECG_DCLO_THRESHOLD
Select DCLO threshold for the ECG inputs.
ECG_DIG_CTRL
0x0102, Bits[8:3]
ECG_OVERSAMPLE_RATIO
For ECG only mode, keep the default value. For multimodal, refer to the
register description.
0x0102, Bits[2:0]
ECG_ODR_SEL
Select the ECG ODR.



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