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Data Sheet

ADPD6000

THEORY OF OPERATION

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Rev. 0 | 16 of 89

INTRODUCTION

The ADPD6000 is a multimodal, vital signal monitoring AFE that

comprises three high performance signal chains: an optical meas-

urement path (PPG), ECG measurement path, and BIA measure-

ment path.

The PPG measurement path works as a transceiver that supports

up to four LEDs and four photodiode inputs. The current on the

LEDs is programmable from two 7-bit LED drivers. The receiver

path provides two high performance readout channels that can

sample simultaneously and can be configured separately. Two

high performance current DACs (IDACs) are implemented in each

channel to provide first class ambient light suppression and large

dynamic range in different application scenarios.

The ECG measurement path offers a high input impedance, low

noise, high dynamic range solution to allow high quality ECG signal

acquisition in wearable devices. Both DCLO detection and ACLO

detection are integrated to guarantee proper detectability.

The stimulus in the BIA path offers a sine wave with various op-

tions for frequency, amplitude, and phase to make the ADPD6000

suitable for measurement in different scenarios. A low noise TIA,

programmable gain amplifier (PGA), filter, and ADC are integrated

in the receiver channel to provide high performance impedance

measurement. Direct digital synthesis (DDS) and discrete Fourier

transform (DFT) engines are also integrated in this path.

An internal state machine allows flexible control of these three

measurement paths. The acquisition data can be stored in a 640-

byte FIFO.

TIME SLOT OPERATION

An internal configurable controller handles the operation of the

ADPD6000. This controller generates the timing needed to gener-

ate sampling regions comprising combinations of the three meas-

urement paths and sleep periods. To facilitate the use of multiple

signal chains, multiple time slots handle the access to different

transmitters or receivers.

The system is characterized by the ODR, which determines the

repetition periodicity of each enabled time slot. The enabled time

slots are repeated at the time slot rate configured by the TIME-

SLOT_PERIOD_x bits.

There are 19 time slots in the ADPD6000, as shown in Figure 26.

Each enabled PPG and BIA time slot is repeated at the time slot

rate, followed by an ultra low power sleep period.

ECG_TS is the ECG time slot. The operation of the ECG signal

chain is not in time slot fashion. After the ECG time slot turns on,

the ECG signal chain runs until the system stops. However, the

ECG signal chain output data is synchronized to the FIFO with this

time slot rate.

Following the ECG time slot, there are 12 PPG time slots

(PPG_TSA to PPG_TSL). Each PPG time slot allows the creation

of one or more LED pulses and modulate pulses, as well as the

acquisition of the photodiode or other device current based on that

stimulus. The operating parameters for each time slot are highly

configurable.

The last six time slots are the BIA time slots (BIA_TSA to

BIA_TSF). Each BIA time slot allows the excitation voltages, fre-

quencies, and receiver configurations to facilitate accurate body

impedance measurement.

Equation 1 determines the sampling rate (time slot rate), as follows:

Sampling Rate=Timer Clock Frequency

Hz/TIMESLOT_PERIOD_x

(1)

Table 9. Sources of Low Frequency Clock (LFCLK) and Timer Clock1

LFCLK

Timer Clock

ALT_CLOCKS TM_CLK_GPIO_SEL

960 kHz internal

960 kHz internal 0

N/A

960 kHz external

960 kHz external 1

N/A

960 kHz internal

960 kHz internal 2

N/A

1 MHz external

(divided from 32

MHz)

1 MHz external

(divided from 32

MHz)

N/A

960 kHz internal

960 kHz external 4

960 kHz internal

32 kHz external

1 N/A means not applicable.

Figure 26. Time Slot Allocation

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