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ADC3641 датащи(PDF) 35 Page - Texas Instruments

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номер детали ADC3641
подробное описание детали  ADC364x 14-bit, 10-MSPS to 65-MSPS, Low-Noise, Low Power Dual Channel ADC
PDF  77 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI - Texas Instruments

ADC3641 датащи(HTML) 35 Page - Texas Instruments

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8.3.4.6 Output Formatting with Decimation
8.3.4.6.1 Parallel CMOS
In parallel CMOS mode, the ADC364x device only supports real output with DDR CMOS interface as shown in
Figure 8-35 (real decimation). Here the output format is selected to 14-bit since the parallel output bus only
supports up to 14-bit.
DCLK
DB6
(MSB)
DB0
DA6
(MSB)
DA0
DCLK
DDR CMOS
ChA/B:
DA0..DB0
D6
D0
D6
D0
D13
D7
D13
D7
Figure 8-35. Output Data Format in Real Decimation
Table 8-4 illustrates the output interface data rate along with the corresponding DCLK frequency based on real
decimation setting (M).
Furthermore the table shows an actual lane rate example with complex decimation by 4.
Table 8-4. Parallel CMOS Data Rate Examples with Decimation
REAL/COMPLEX
DECIMATION
DECIMATION
SETTING
ADC SAMPLING RATE
DDR CMOS
DCLK
DOUT
Real
M
FS
DDR
FS / M
FS x 2 / M
4
65 MHz
DDR
16.25 MHz
32.5 MHz
www.ti.com
ADC3643
SBAS886 – OCTOBER 2020
Copyright © 2020 Texas Instruments Incorporated
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