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ADC3641 датащи(PDF) 30 Page - Texas Instruments

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номер детали ADC3641
подробное описание детали  ADC364x 14-bit, 10-MSPS to 65-MSPS, Low-Noise, Low Power Dual Channel ADC
PDF  77 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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ADC3641 датащи(HTML) 30 Page - Texas Instruments

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8.3.4.2 Digital Filter Operation
The complex decimation operation is illustrated with an example in Figure 8-20. First the input signal (and the
negative image) are frequency shifted by the NCO frequency as shown on the left. Next a digital filter is applied
(centered around 0 Hz) and the output data rate is decimated - in this example the output data rate FS,OUT = FS/8
with a Nyquist zone of FS/16. During the complex mixing the spectrum (signal and noise) is split into real and
complex parts and thus the amplitude is reduced by 6-dB. In order to compensate this loss, there is a 6-dB
digital gain option in the decimation filter block that can be enabled via SPI write.
FS/2
-FS/2
Shifted Input
Signal (Alias)
Shifted Input Signal
Negative Image
Decimation
by 8
0
FS/2
-FS/2
Input Signal
(Alias)
Input Signal
Negative Image
FNCO
0
NCO Tuning Range
-FIN + FNCO
FIN + FNCO
FS/16
-FS/16
Figure 8-20. Complex decimation illustration
The real decimation operation is illustrated with an example in Figure 8-21. There is no frequency shift
happening and only the real portion of the complex digital filter is exercised. The output data rate is decimated -
a decimation of 8 would result in an output data rate FS,OUT = FS/8 with a Nyquist zone of FS/16.
During the real mixing the spectrum (signal and noise) amplitude is reduced by 3-dB. In order to compensate this
loss, there is a 3-dB digital gain option in the decimation filter block that can be enabled via SPI write.
FS/2
FS/4
FS/8
FS/16
FS/32
Decimation by 2
Decimation by 4
Decimation by 8
Decimation by
16
Decimation by
32
FS/64
Input Signal
Figure 8-21. Real decimation illustration
ADC3643
SBAS886 – OCTOBER 2020
www.ti.com
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