LP8733 datasheet(29/85 Pages) TI

29 / 85 page

LP8733-Q1

www.ti.com

SNVSB64 – SEPTEMBER 2018

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(1)

PGOOD_STAT bit is 1 when the PGOOD pin shows valid voltages. PGOOD_POL bit in PGOOD_CTRL_1 register affects only PGOOD

pin polarity, not Power Good and PGOOD_INT interrupt polarity.

(2)

Interrupt is generated during clock-detector operation and if clock is not available when clock detector is enabled.

Table 4. Summary of Interrupt Signals

EVENT

OUTCOME

INTERRUPT BIT

INTERRUPT MASK BIT

STATUS BIT

RECOVERY/INTERRUPT

CLEAR

Buck current limit triggered

No effect

BUCK_INT

BUCKx_ILIM_INT

BUCKx_ILIM_MASK

BUCKx_ILIM_STAT

Write 1 to BUCKx_ILIM_INT bit

Interrupt is not cleared if current

limit is active

LDO current limit triggered

No effect

LDO_INT

LDOx_ILIM_INT

LDOx_ILIM_MASK

LDOx_ILIM_STAT

Write 1 to LDOx_ILIM_INT bit

Interrupt is not cleared if current

limit is active

Buck short circuit (VVOUT < 0.35

V at 1 ms after enable) or

overload (VVOUT decreasing

below 0.35 V during operation,

1-ms debounce)

Regulator disable

BUCK_INT

BUCKx_SC_INT

N/A

Write 1 to BUCKx_SC_INT bit

LDO short circuit (VVOUT < 0.3

V at 1 ms after enable) or

overload (VVOUT decreasing

below 0.3 V during operation,

1-ms debounce)

Regulator disable

LDO_INT

LDOx_SC_INT

N/A

Write 1 to LDOx_SC_INT bit

Thermal warning

No effect

TDIE_WARN_INT

TDIE_WARN_MASK

TDIE_WARN_STAT

Write 1 to TDIE_WARN_INT bit

Interrupt is not cleared if

temperature is above thermal

warning level

Thermal shutdown

All regulators disabled

immediately and GPO

and GPO2 are set to low

TDIE_SD_INT

N/A

TDIE_SD_STAT

Write 1 to TDIE_SD_INT bit

Interrupt is not cleared if

temperature is above thermal

shutdown level

VANA overvoltage (VANAOVP)

All regulators disabled

immediately and GPO

and GPO2 are set to low

OVP_INT

N/A

OVP_STAT

Write 1 to OVP_INT bit

Interrupt is not cleared if VANA

voltage is above VANAOVP level

Buck power good, output

voltage becomes valid

No effect

BUCK_INT

BUCKx_PG_INT

BUCKx_PGR_MASK

BUCKx_PG_STAT

Write 1 to BUCKx_PG_INT bit

Buck power good, output

voltage becomes invalid

No effect

BUCK_INT

BUCKx_PG_INT

BUCKx_PGF_MASK

BUCKx_PG_STAT

Write 1 to BUCKx_PG_INT bit

LDO Power Good, output

voltage becomes valid

No effect

LDO_INT

LDOx_PG_INT

LDOx_PGR_MASK

LDOx_PG_STAT

Write 1 to LDOx_PG_INT bit

LDO power good, output

voltage becomes invalid

No effect

LDO_INT

LDOx_PG_INT

LDOx_PGF_MASK

LDOx_PG_STAT

Write 1 to LDOx_PG_INT bit

PGOOD pin changing from

active to inactive state

(1)

No effect

PGOOD_INT

PGOOD_MASK

PGOOD_STAT

Write 1 to PGOOD_INT bit

External clock appears or

disappears

No effect to regulators

SYNC_CLK_INT

(2)

SYNC_CLK_MASK

SYNC_CLK_STAT

Write 1 to SYNC_CLK_INT bit

Load current measurement

ready

No effect

I_MEAS_INT

I_MEAS_MASK

N/A

Write 1 to I_MEAS_INT bit

Supply voltage VANAUVLO

triggered (VANA falling)

Immediate shutdown,

registers reset to default

values

N/A

Supply voltage VANAUVLO

triggered (VANA rising)

Startup, registers reset to

default values and OTP

bits loaded

RESET_REG_INT

RESET_REG_MASK

N/A

Write 1 to RESET_REG_INT bit

Software requested reset

Immediate shutdown

followed by power up,

registers reset to default

values

RESET_REG_INT

RESET_REG_MASK

N/A

Write 1 to RESET_REG_INT bit

7.3.8.1 Power-Good Information (PGOOD pin)

In addition to the interrupt-based indication of the current limit and the Power-Good level the LP8733xx-Q1

device supports monitoring with PGOOD signal:

•

Regulator output voltage,

•

Input supply overvoltage,

•

Thermal warning and

•

Thermal shutdown.

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