LP8733 datasheet(23/85 Pages) TI

23 / 85 page

LP8733-Q1

www.ti.com

SNVSB64 – SEPTEMBER 2018

Submit Documentation Feedback

Similarly there are two ways to enable and disable the LDO regulators:

•

Using LDOx_EN bit in LDOx_CTRL register (LDOx_EN_PIN_CTRL bit is 0 in LDOx_CTRL register)

•

Using EN control pin (LDOx_EN bit is 1 AND LDOx_EN_PIN_CTRL bit is 1)

If the EN control pin is used for enable and disable then the delay from the control signal rising edge to start-up

is set by BUCKx_STARTUP_DELAY[3:0] bits in BUCKx_DELAY register and LDOx_STARTUP_DELAY[3:0] bits

in LDOx_DELAY register and the delay from control signal falling edge to shutdown is set by

BUCKx_SHUTDOWN_DELAY[3:0] bits in BUCKx_DELAY register and LDOx_SHUTDOWN_DELAY[3:0] bits in

LDOx_DELAY register. The delays are valid only for EN signal transitions and not for control with I2C writings to

BUCKx_EN and LDOx_EN bits.

The control of the regulator (with 0-ms delays) is shown in Table 3. Dual-phase regulator is controlled with

registers of the master phase.

Table 3. Regulator Control

BUCKx_EN /

LDOx_EN

BUCKx_EN_PIN_CTRL /

LDOx_EN_PIN_CTRL

EN PIN

BUCKx OUTPUT VOLTAGE /

LDOx OUTPUT VOLTAGE

Enable/disable control with

BUCKx_EN/LDOx_EN bit

Don't Care

Disabled

Don't Care

BUCKx_VSET[7:0] / LDOx_VSET[4:0]

Enable/disable control with

EN pin

Low

Disabled

High

BUCKx_VSET[7:0] / LDOx_VSET[4:0]

The buck regulator is enabled by the EN pin or by I2C writing as shown in Figure 13. The soft-start circuit limits

the in-rush current during start-up. When the output voltage rises to a 0.35-V level, the output voltage becomes

slew-rate controlled. If there is a short circuit at the output, and the output voltage does not increase above the

0.35-V level in 1 ms or the output voltage drops below 0.35-V level during operation (for minimum of 1 ms), the

regulator is disabled, and BUCKx_SC_INT interrupt in INT_BUCK register is set. When the output voltage

reaches the Power-Good threshold level the BUCKx_PG_INT interrupt flag in INT_BUCK register is set. The

Power-Good interrupt flag when reaching valid output voltage can be masked using BUCKx_PGR_MASK bit in

BUCK_MASK register. The Power-Good interrupt flag can be also generated when the output voltage becomes

invalid. The interrupt mask for invalid output voltage detection is set by BUCKx_PGF_MASK bit in BUCK_MASK

means valid and 0 means invalid output voltage. A PGOOD_WINDOW_BUCK bit in PGOOD_CTRL_1 register

sets the detection method for the valid buck output voltage, either undervoltage detection or undervoltage and

overvoltage detection.

LP8733 датащи(PDF) 23 Page - Texas Instruments

LP8733 датащи(HTML) 23 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85

датащи скачать

ссылки URL