LP8733 datasheet(45/85 Pages) TI

45 / 85 page

LP8733-Q1

www.ti.com

SNVSB64 – SEPTEMBER 2018

Submit Documentation Feedback

Bits

Field

Type

Default

Description

7:6

Reserved

R/W

5:3

BUCK0_ILIM[2:0]

R/W

Sets the switch current limit of Buck0. Can be programmed at any time during

operation:

0x0 - 1.5 A

0x1 - 2.0 A

0x2 - 2.5 A

0x3 - 3.0 A

0x4 - 3.5 A

0x5 - 4.0 A

0x6 - Reserved

0x7 - Reserved

2:0

BUCK0_SLEW_RA

TE[2:0]

R/W

Sets the output voltage slew rate for Buck0 regulator (rising and falling edges):

0x0 - Reserved

0x1 - Reserved

0x2 - 10 mV/µs

0x3 - 7.5 mV/µs

0x4 - 3.8 mV/µs

0x5 - 1.9 mV/µs

0x6 - 0.94 mV/µs

0x7 - 0.47 mV/µs

7.6.1.5 BUCK1_CTRL_1

Address: 0x04

Reserved

BUCK1_FPWM

BUCK1_RDIS_

BUCK1_EN_PI

N_CTRL

BUCK1_EN

Bits

Field

Type

Default

Description

7:4

Reserved

R/W

0000

BUCK1_FPWM

R/W

Buck1 mode selection:

0 - Automatic transitions between PFM and PWM modes (AUTO mode)

1 - Forced to PWM operation.

BUCK1_RDIS_EN

R/W

Enable output discharge resistor (RDIS_Bx) when Buck1 is disabled:

0 - Discharge resistor disabled

1 - Discharge resistor enabled.

BUCK1_EN_PIN

_CTRL

R/W

Enable control for Buck1:

0 - only BUCK1_EN bit controls Buck1

1 - BUCK1_EN bit AND EN pin control Buck1.

BUCK1_EN

R/W

Enable Buck1 regulator:

0 - Buck1 regulator is disabled

1 - Buck1 regulator is enabled.

7.6.1.6 BUCK1_CTRL_2

Address: 0x05

Reserved

BUCK1_ILIM[2:0]

BUCK1_SLEW_RATE[2:0]

LP8733 датащи(PDF) 45 Page - Texas Instruments

LP8733 датащи(HTML) 45 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85

датащи скачать

ссылки URL