LP8733 datasheet(47/85 Pages) TI

47 / 85 page

LP8733-Q1

www.ti.com

SNVSB64 – SEPTEMBER 2018

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Bits

Field

Type

Default

Description

7:0

BUCK1_VSET[7:0]

R/W

Sets the output voltage of Buck0 regulator

Reserved, DO NOT USE

0x00 ... 0x13

0.7 V - 0.73 V, 10 mV steps

0x14 - 0.7V

...

0x17 - 0.73 V

0.73 V - 1.4 V, 5 mV steps

0x18 - 0.735 V

...

0x9D - 1.4 V

1.4 V - 3.36 V, 20 mV steps

0x9E - 1.42 V

...

0xFF - 3.36 V

7.6.1.9 LDO0_CTRL

Address: 0x08

Reserved

LDO0_RDIS_E

LDO0_EN_PIN

_CTRL

LDO0_EN

Bits

Field

Type

Default

Description

7:3

Reserved

R/W

0 0000

LDO0_RDIS_EN

R/W

Enable output discharge resistor (RDIS_LDOx) when LDO0 is disabled:

0 - Discharge resistor disabled

1 - Discharge resistor enabled.

LDO0_EN_PIN

_CTRL

R/W

Enable control for LDO0:

0 - only LDO0_EN bit controls LDO0

1 - LDO0_EN bit AND EN pin control LDO0.

LDO0_EN

R/W

Enable LDO0 regulator:

0 - LDO0 regulator is disabled

1 - LDO0 regulator is enabled.

7.6.1.10 LDO1_CTRL

Address: 0x09

Reserved

LDO1_RDIS_E

LDO1_EN_PIN

_CTRL

LDO1_EN

Bits

Field

Type

Default

Description

7:3

Reserved

R/W

0 0000

LDO1_RDIS_EN

R/W

Enable output discharge resistor (RDIS_LDOx) when LDO1 is disabled:

0 - Discharge resistor disabled

1 - Discharge resistor enabled.

LDO1_EN_PIN

_CTRL

R/W

Enable control for LDO1:

0 - only LDO1_EN bit controls LDO1

1 - LDO1_EN bit AND EN pin control LDO1.

LDO1_EN

R/W

Enable LDO1 regulator:

0 - LDO1 regulator is disabled

1 - LDO1 regulator is enabled.

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