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UPD360 датащи(PDF) 170 Page - Microchip Technology |
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UPD360 датащи(HTML) 170 Page - Microchip Technology |
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170 / 221 page ![]() UPD360 DS00002084C-page 170 2016-2017 Microchip Technology Inc. 11.4.5.3 BIST Error Count High Register (BIST_ERR_CNT_HI) 11.4.5.4 BIST Error Count Low Register (BIST_ERR_CNT_LO) 11.4.5.5 BIST RX Status Register (BIST_RX_STAT) This register is used to help with functional testing. Hardware is configured to transmit BIST PRBS frames. At the same time, loopback mode is enabled and BIST receive mode is enabled. Now when a PRBS frame is transmitted it is also received and compared. This register provides information when the BIST PRBS frame is done receiving and whether there were any errors detected. Address: 1AC2h Size: 8 bits Bits Description Type Default 7:0 BIST_ERR_CNT_HI[7:0] Upper byte of BIST error count (bits 15-8) (BIST_ERR_CNT[15:8]) RO 00h Address: 1AC3h Size: 8 bits Bits Description Type Default 7:0 BIST_ERR_CNT_LO[7:0] Lower byte of BIST error count (bits 7-0) (BIST_ERR_CNT[7:0]) RO 00h Address: 1AC7h Size: 8 bits Bits Description Type Default 7:2 RESERVED RO - 1 BIST_RX_ERROR This bit is valid only when BIST_RX_DONE bit is set. A value of “0” indicates that BIST PRBS frame was received without errors. A value of “1” indicates that BIST PRBS frame was received with errors. RO 0b 0 BIST_RX_DONE Successfully received a BIST RX FRAME. Writing a “1” to this bit will clear it. R/W1C 0b |
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