82801E datasheet(45/84 Pages) INTEL

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Intel® 82801E C-ICH

Advance Information Datasheet

3.2.15

Other Clocks

3.2.16

Universal Asynchronous Receive and Transmit (UART 0,1)

Table 21. Other Clocks

Name

Type

Description

CLK14

Oscillator Clock: CLK14 is used for 8254 timers and runs at 14.31818 MHz.

CLK48

48 MHz Clock: CLK48 is used to for the USB controller and runs at 48 MHz.

CLK66

(HLCLK)

66 MHz Clock (HLCLK): CLK66 is used for the hub interface and runs at 66 MHz.

Table 22. Universal Asynchronous Receive And Transmit (UART 0, 1) (Sheet 1 of 2)

Signal Name

Type

Description

UART_CLK

Input clock to the SIU. This clock is passed to the baud clock generation logic of

each UART in the SIU.

SIU0_CTS#

SIU1_CTS#

Clear to Send: Active low, this pin indicates that data can be exchanged

between CICH and external interface. These pins have no effect on the

transmitter.

NOTE: These pins could be used as Modem Status Inputs whose condition can

be tested by the processor by reading bit 4 (CTS) of the Modem Status

(DCTS) of the MSR indicates whether the CTS# input has changed state

since the previous reading of the MSR. When the CTS bit of the MSR

changes state an interrupt is generated if the Modem Status Interrupt is

enabled.

SIU0_DCD#

SIU1_DCD#

Data Carrier Detect for UART0 and UART1: Active low, this pin indicates that

data carrier has been detected by the external agent.

NOTE: These pins are Modem Status Inputs whose condition can be tested by

the processor by reading bit 7 (DCD) of the Modem Status register

(MSR). Bit 7 is the complement of the DCD# signal. Bit 3 (DDCD) of the

MSR indicates whether the DCD# input has changed state since the

previous reading of the MSR. When the DCD bit of the MSR changes

state an interrupt is generated if the Modem Status Interrupt is enabled.

SIU0_DSR#

SIU1_DSR#

Data Set Ready for UART0 and UART1: Active low, this pin indicates that the

external agent is ready to communicate with 82801E C-ICH UARTs. These pins

have no effect on the transmitter.

NOTE: These pins could be used as Modem Status Input whose condition can

be tested by the processor by reading bit 5 (DSR) of the Modem Status

Modem status register (MSR) indicates whether the DSR# input has

changed state since the previous reading of the MSR. When the DSR bit

of the MSR changes state an interrupt is generated if the Modem Status

Interrupt is enabled.

SIU0_DTR#

SIU1_DTR#

Data Terminal Ready for UART0 and UART1: When low these pins informs the

modem or data set that 82801E C-ICH UART0 and UART1 are ready to establish

a communication link. The DTR#x(x=0,1) output signals can be set to an active

low by programming the DTRx (x-0,1) (bit0) of the Modem control register to a

logic ‘1’. A Reset operation sets this signal to its inactive state (logic ‘1’). LOOP

mode operation holds this signal in its inactive state.

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