AD9958SLASHPCB datasheet(24/40 Pages) AD

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AD9958

Rev. 0 | Page 24 of 40

Method two is by setting the CFR <14> bit and issuing an I/O

update. If sweep is enabled and CFR <14> is set, the ramp rate

timer loads the value determined by the profile pin: If the

profile pin is high the ramp rate timer loads the RSRR, if the

profile pin is low the ramp rate timer loads the FSRR.

Frequency Linear Sweep Example: AFP Bits = 10

Modulation level bits = 00, sweep enable = 1, no-dwell bit = 0.

In linear sweep mode, when the profile pin transitions from low

to high, the RDW is applied to the input of the sweep

accumulator and the RSRR register is loaded into the sweep rate

timer.

The RDW accumulates at the rate given by the ramp rate

(RSRR) until the output is equal to the CTW1 register value.

The sweep is then complete and the output is held constant in

frequency.

When the profile pin transitions from high to low, the FDW is

applied to the input of the sweep accumulator and the FSRR

The FDW accumulates at the rate given by the ramp rate

(FSRR) until the output is equal to the CTW0 register value.

The sweep is then complete and the output is held constant in

frequency.

See Figure 36 for the linear sweep block diagram. Figure 38

depicts a frequency sweep with no-dwell mode disabled. In this

mode, the output follows the state of the profile pin. A phase or

amplitude sweep works in the same manner.

LINEAR SWEEP—NO-DWELL MODE

If the linear sweep no-dwell bit is set (CFR <15>), the rising

sweep is started in an identical manner to the dwell linear

sweep mode. That is, upon detecting Logic 1 on the profile

input pin, the rising sweep action is initiated. The word

continues to sweep up at the rate set by the rising sweep ramp

rate at the resolution set by the rising delta tuning word until it

reaches the terminal value. Upon reaching the terminal value,

the output immediately reverts back to the starting point and

remains until Logic 1 is detected on the profile pin. Figure 37

shows an example of the no-dwell mode. The points labeled “A”

indicate where a rising edge is detected on the profile pin and

the points labeled “B” indicate where the AD9958 has

determined that the output has reached E0 and reverts to S0.

The falling ramp rate register and the falling delta word are

unused in this mode.

RATE TIME

LOAD CONTROL

LOGIC

LIMIT LOGIC TO

KEEP SWEEP BETWEEN

S0 AND E0

RAMP RATE TIMER:

8-BIT LOADABLE DOWN COUNTER

ACCUMULATOR RESET

LOGIC

MUX

PROFILE PIN

MUX

FDW

RDW

FSRR

RSRR

PROFILE PIN

Z–1

CTW1

SWEEP ACCUMULATOR

SWEEP ADDER

CTW0

Figure 36. Linear Sweep Block Diagram

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