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AD9958/PCB датащи(PDF) 30 Page - Analog Devices |
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AD9958/PCB датащи(HTML) 30 Page - Analog Devices |
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30 / 40 page ![]() AD9958 Rev. 0 | Page 30 of 40 tDV tDV CS SCLK SDIO SDO (SDIO_2) SYMBOL DEFINITION MIN DATA VALID TIME 12ns Figure 41. Timing Diagram for Data Read for Serial I/O Port INSTRUCTION BYTE DESCRIPTION The instruction byte contains the following information. Table 25. MSB D6 D5 D4 D3 D2 D1 LSB R/Wb x1 x1 A4 A3 A2 A1 A0 1x = don’t care bit. Bit 7 of the instruction byte (R/Wb) determines whether a read or write data transfer occurs after the instruction byte write. A logic high indicates a read operation. Logic 0 indicates a write operation. Bits 4 to 0 of the instruction byte determine which register is accessed during the data transfer portion of the communications cycle. The internal byte addresses are generated by the AD9958. SERIAL I/O PORT PIN DESCRIPTION Serial Data Clock (SCLK). The serial clock pin is used to synchronize data to and from the internal state machines of the AD9958. The maximum SCLK toggle frequency is 200 MHz. Chip Select (CS). The chip select pin allows more than one AD9958 device to be on the same set of serial communications lines. The chip select is an active low enable pin. Defined SDIO inputs go to a high impedance state when CS is high. If CS is driven high during any communications cycle, that cycle is suspended until CS is reactivated low. The CS pin can be tied low in systems that maintain control of SCLK. Serial Data I/O (SDIO_0:3). Of the four SDIO pins, only the SDIO_0 pin is a dedicated SDIO pin. SDIO_1:3 can also be used to RU/RD the output amplitude. Bits <2:1> in the channel select register (CSR Register 0x00) control the configuration of these pins. See the Serial I/O Modes of Operation section for more information. SERIAL I/O PORT FUNCTION DESCRIPTION Serial Data Out (SDO). The SDO function is available in single- bit (3-wire) mode only. In SDO mode, data is read from the SDIO_2 pin for protocols that use separate lines for trans- mitting and receiving data (see Table 26 for pin configuration options). Bits <2:1> in the CSR register (Register 0x00) control the configuration of this pin. The SDO function is not available in 2-bit or 4-bit serial I/O modes. SYNC_I/O. The SYNC_I/O function is available in 1-bit and 2-bit modes. SDIO_3 serves as the SYNC_I/O pin when this function is active. Bits <2:1> in the CSR register (Register 0x00) control the configuration of this pin. Otherwise the SYNC_I/O function is used to synchronize the I/O port state machines without affecting the addressable register contents. An active high input on the SYNC_I/O (SDIO_3) pin causes the current communication cycle to abort. After SDIO_3 returns low (Logic 0), another communication cycle can begin, starting with the instruction byte write. The SYNC_I/O function is not available in 4-bit serial I/O mode. MSB/LSB TRANSFER DESCRIPTION The AD9958 serial port can support both MSB-first or LSB-first data formats. This functionality is controlled by CSR <0> in the channel select register (CSR). MSB-first is the default mode. When CSR <0> is set high, the serial port is in LSB-first format. The instruction byte must be written in the format indicated by CSR <0>. That is, if the AD9958 is in LSB-first mode, the instruction byte must be written from LSB to MSB. If the AD9958 is in MSB-first mode (default), the instruction byte must be written from MSB to LSB. Example Operation To write the Function Register 1 (FR1) in MSB-first format, apply an instruction byte of MSB > 00000001 < LSB, starting with the MSB. From this instruction, the internal controller recognizes a write transfer of three bytes starting with the MSB, Bit <23>, in the FR1 address (Register 0x01). Bytes are written on each consecutive rising SCLK edge until Bit<0> is transferred. Once the last data bit is written, the I/O communication cycle is complete and the next byte is considered an instruction byte. To write the Function Register 1 (FR1) in LSB-first format, apply an instruction byte of MSB > 00000001 < LSB, starting with the LSB. From this instruction, the internal controller recognizes a write transfer of three bytes, starting with the LSB <0> in the FR1 address (0x01). Bytes are written on each consecutive rising SCLK edge until Bit <23> is transferred. Once the last data bit is written, the I/O communication cycle is complete and the next byte is considered an instruction byte. |
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