AD9958SLASHPCB datasheet(21/40 Pages) AD

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AD9958

Rev. 0 | Page 21 of 40

Table 7.

Modulation Level Bits FR1 <9:8>

Description

2-level modulation

4-level modulation

8-level modulation

16-level modulation

When modulating, the RU/RD function can be limited based

on pins available for controlling the feature. SDIO pins are for

RU/RD only, not modulation.

Table 8.

RU/RD Bits

FR1 <11:10>

Description

RU/RD disabled.

Only profile Pin 2 and Pin 3 available for RU/RD

operation.

Only profile Pin 3 available for RU/RD

operation.

Only SDIO Pins 1, 2, and 3 available for RU/RD

operation. Forces the serial I/O to only be used

in 1-bit mode.

If profile pins are used for RU/RD, Logic 0 is for ramp-up and

Logic 1 is for ramp-down.

Because of the two channels and limited data pins, it is

necessary to assign the profile pins and/or SDIO_1:3 pins to a

dedicated channel. This is controlled by the profile pin

configuration or PPC bits (FR1 <14:12>). Each modulation

description to follow incorporates data pin assignments.

2-Level Modulation—No RU/RD

Modulation level bits are set to 00 (2-level). AFP bits are set to

the desired modulation type. RU/RD bits and the linear sweep

bit are disabled. Table 9 displays how the profile pins and

channels are assigned.

Table 9.

Profile Pin

Configuration(PPC)

Bits FR1<14:12>

Description

N/A

CH0

CH1

2-level

mode both

channels,

no RU/RD

As shown in Table 9, only Profile Pin P2 can be used to

modulate Channel 0. If the P2 pin is Logic 0, Register 0

(Register 0x04) is chosen; if the P2 pin is Logic 1, Register 1

(Register 0x0A) is chosen.

4-Level Modulation—No RU/RD

Modulation level bits are set to 01 (4-level). AFP bits are set to

the desired modulation type. RU/RD bits and the linear sweep

bit are disabled. Table 10 displays how the profile pins and

channels are assigned to each other.

Table 10.

Profile Pin

Config. (PPC)

Bits FR1

<14:12>

Description

CH0

CH1

4-level modulation

on CH0 and CH1,

no RU/RD

For this condition, the profile register chosen is based on the

two bit value presented to profile pins <P0:P1> or <P2:P3>.

For example, if PPC = 101, <P0:P1>= 11, and <P2:P3>= 01,

then the contents of Profile Register 3 of Channel 0 are

presented to Channel 0’s output and the contents of Profile

8-Level Modulation—No RU/RD

Modulation level bits are set to 10 (8-level). AFP bits are set to a

nonzero value. RU/RD bits and the linear sweep bit are

disabled. Note that the AFP bits of the three channels not being

used must be set to 00. Table 11 shows the assignment of profile

pins and channels.

Table 11.

Profile Pin

Config. Bits

FR1 <14:12>

Description

CH0

8-level modulation

on CH0, no RU/RD

CH1

8-level modulation

on CH1, no RU/RD

For this condition, the profile register (1 of 16) chosen is based

on the 3-bit value presented to the profile <P0-P2> pins. For

example, if PPC = X10 and <P0-P2> = 111, the contents of

Profile Register 7 of Channel 0 are presented to Channel 0.

16-Level Modulation—No RU/RD

Modulation level bits are set to 11 (16-level). AFP bits are set to

the desired modulation type. RU/RD bits and the linear sweep

bit are disabled. The AFP bits of the three channels not being

used must be set to 00. Table 12 displays how the profile pins

and channels are assigned.

Table 12.

Profile Pin

Config. (PPC) Bits

FR1 <14:12>

Description

CH0

16-level

modulation on

CH0, no RU/RD

CH1

16-level

modulation on

CH1, no RU/RD

For these conditions, the profile register chosen is based on

the 4-bit value presented to profile <P0-P3> pins. For example

if PPC = X11 and <P0-P3> = 1110, the contents of Profile

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