CS5530A datasheet(47/259 Pages) NSC

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Functional Description (Continued)

3.2.2

PCI Target

The

CS5530A

positively

decodes

PCI

transactions

intended for any internal registers, the ROM address

range, and several peripheral and user-defined address

ranges. For positive-decoded transactions, the CS5530A is

a medium responder. Table 3-3 lists the valid C/BE# encod-

ing for PCI target transactions.

The CS5530A acts as the subtractive agent in the system

since it contains the ISA bridge functionality. Subtractive

decoding ensures that all accesses not positively claimed

by PCI devices are forwarded to the ISA bus. The subtrac-

tive-decoding sample point can be configured as slow,

default, or disabled via F0 Index 41h[2:1]. Table 3-4 shows

these programming bits. Figure 3-4 shows the timing for

subtractive decoding.

Note:

I/Oaccesses that aremis-alignedsoastoinclude

address 0FFFFh and at least one byte beyond will

“wrap” around to I/O address 0000h.

Figure 3-4. Subtractive Decoding Timing

Table 3-3. PCI Command Encoding

C/BE[3:0]#

Command Type

0000

Interrupt Acknowledge

0001

Special Cycles: Shutdown,

AD[15:0] = 0000

Special Cycles: Halt, AD[15:0] = 0001

0010

I/O Read

0011

I/O Write

010x

Reserved

0110

Memory Read

0111

Memory Write

100x

Reserved

1010

Configuration Read

1011

Configuration Write

1100

Memory Read Multiple

(memory read only)

1101

Reserved

1110

Memory Read Line (memory read only)

1111

Memory Write, Invalidate (memory write)

Table 3-4. Subtractive Decoding Related Bits

Bit

Description

F0 Index 41h

PCI Function Control Register 2 (R/W)

Reset Value = 10h

2:1

Subtractive Decode: These bits determine the point at which the CS5530A accepts cycles that are not claimed by another

device. The CS5530A defaults to taking subtractive decode cycles in the default cycle clock, but can be moved up to the

Slow Decode cycle point if all other PCI devices decode in the fast or medium clocks. Disabling subtractive decode must be

done with care, as all ISA and ROM cycles are decoded subtractively.

00 = Default sample (4th clock from FRAME# active)

01 = Slow sample (3rd clock from FRAME# active)

1x = No subtractive decode

PCI_CLK

FRAME#

IRDY#

TRDY#

DEVSEL#

FAST

MED

SLOW

SUB

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