SLG46110V datasheet(55/82 Pages) DIALOG

номер детали	SLG46110V

подробное описание детали	Data Communications Equipment

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000-0046110-106

Page 54 of 81

SLG46110

12.0 Counters/Delay Generators (CNT/DLY)

There are three configurable counters/delay generators in the SLG46110. The three counters/delay generators (CNT/DLY 0, 1,

3) are 8-bit. For flexibility, each of these macrocells has a large selection of internal and external clock sources, as well as the

option to chain from the output of the previous (N-1) CNT/DLY macrocell, to implement longer count / delay circuits.

Two of the counter/delay generator macrocells (CNT/DLY0 and CNT/DLY1) have two inputs from the connection matrix, one for

Delay Input/Reset Input (Delay_In/Reset_In), and one for an external counter/clock source. One of the counter/delay generator

macrocells (CNT/DLY3) has one input from the connection matrix, which has a shared function of either a Delay Input or an

external clock input.

Note that there is also one Combination Function Macrocells that can implement either 4-bit LUTs or 8-bit counter / delays, For

more information please see Section 10.4 4-Bit LUT or 8- Bit Counter / Delay Macrocells.

Figure 36. CNT/DLY0

CNT/DLY0

Counter_end

clk

To Connection

Matrix Input <16>

From Connection

Matrix Output <31>

Count_end_out_x-1

reg <314>

ext. clock from CM Out<33>

RC Osc/64

RC Osc/24

RC Osc/12

RC Osc/4

RC Osc

Counter Control Data

reg <325:318>

reg <317:315>

Delay_out

Delay_IN

CNT clock

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