CS4399 datasheet(22/111 Pages) CIRRUS

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DS1113F1

CS4399

4.1 Overview

The internal MCLK is used to generate serial port clocks. See Table 4-6 for supported LRCK combinations.

4.1.5

System Interrupts

The CS4399 includes an open-drain interrupt output (INT pin). Interrupt mask registers control whether an event

associated with an interrupt status/mask bit pair triggers the assertion of INT. All types of interrupts are described in

Section 4.10.

4.1.6

System Reset

The CS4399 offers two types of reset options:

• Asserting RESET. If RESET is asserted, all registers and all state machines are immediately set to their default

values/states. No operation can begin until RESET is deasserted. Before normal operation can begin, RESET must

be asserted at least once after the VP supply is first brought up.

• Power-on reset (POR). If the VD supply is lower than the POR threshold specified in Table 3-13, the VD register

fields and the state machines are held in reset, setting them to their default values/states. The POR releases the

reset when the VD supply goes above the POR threshold. When the VD supply is turned on, the VL and VA supplies

must also be turned on at the same time.

4.1.7

Power Down

The CS4399 has a register byte to power down individual components on the chip. Before any change can be applied to

an individual component (except PLL), the block must be powered down first. For the PLL, changes can be applied after

PLL_START is cleared.

The PDN_HP bit is responsible for enabling or disabling the playback signal chain operation. All the necessary

components for playback operation need to be powered up and configured properly before PDN_HP is cleared. To disable

the playback signal chain, PDN_HP is set. PDN_HP needs to be set before making any changes to the playback signal

chain setup, except the following functions:

• Volume and mute related functions

• PCM filter settings (see Section 7.5.2)

Before ASP, XSP, or DSDIF can safely power down, PDN_HP must be asserted, and PDN_DONE_INT must be present.

For XTAL or PLL used as the source of internal MCLK, PDN_HP needs to be set first and MCLK source needs to be

properly switched away before PDN_XTAL or PDN_PLL is set. If PLL output is only used as the source of CLKOUT, PDN_

PLL can be set without PDN_HP being asserted. If the steps described above are not followed, the CS4399 enters an

unresponsive state.

PDN_CLKOUT does not require PDN_HP to be set before it is asserted.

Recommended power-up and power-down sequences can be found in the Section 5.2.

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