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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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CS4399 датащи(PDF) 74 Page - Cirrus Logic |
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CS4399 датащи(HTML) 74 Page - Cirrus Logic |
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74 / 111 page  74 DS1113F1 CS4399 7.1 Global Registers 1:0 MCLK_SRC_ SEL Select the source of internal MCLK. 00 Direct MCLK/XTAL Mode 01 PLL Mode 10 (Default) RCO Mode 11 Reserved 7.1.6 Serial Port Sample Rate Address 0x1000B R/W 76543210 — ASP_SPRATE Default 00000001 Bits Name Description 7:4 — Reserved 3:0 ASP_SPRATE ASP sample rate. This register must be programmed for both Master Mode and Slave Mode operation. 0000 32 kHz 0001 (Default) 44.1 kHz 0010 48 kHz 0011 88.2 kHz 0100 96 kHz 0101 176.4 kHz 0110 192 kHz 0111 352.8 kHz 1000 384 kHz 1001–1111 Reserved 7.1.7 Serial Port Sample Bit Size Address 0x1000C R/W 76543210 — XSP_SPSIZE ASP_SPSIZE Default 00000101 Bits Name Description 7:4 — Reserved 3:2 XSP_SPSIZE XSP sample bit size. 00 32 bits 01 (Default) 24 bits 10–11 Reserved 1:0 ASP_SPSIZE ASP sample bit size. 00 32 bits 01 (Default) 24 bits 10 16 bits 11 8 bits 7.1.8 Pad Interface Configuration Address 0x1000D R/W 76543210 — XSP_3ST ASP_3ST Default 00000011 Bits Name Description 7:2 — Reserved 1 XSP_3ST Determines the state of the XSP clock drivers when in Master Mode. When in Slave Mode, the serial port clocks are inputs, whose function is not affected by this bit. Before setting an xSP_3ST bit, the associated serial port must be powered down and not powered up until the xSP_3ST bit is cleared. 0 When in Master Mode, serial port clocks are active. 1 (Default) When in Master Mode, serial port clocks are Hi-Z. 0 ASP_3ST Determines the state of the ASP clock drivers when in Master Mode. When in Slave Mode, the serial port clock pins are inputs, whose function is not affected by this bit. Before setting an xSP_3ST bit, the associated serial port must be powered down and not powered up until the xSP_3ST bit is cleared. 0 When in Master Mode, serial port clocks are active. 1 (Default) When in Master Mode, serial port clocks are Hi-Z. Bits Name Description |
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