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TMS320DM641 датащи(PDF) 100 Page - Texas Instruments |
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TMS320DM641 датащи(HTML) 100 Page - Texas Instruments |
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100 / 171 page ![]() Clock PLL 100 June 2003 − Revised August 2004 SPRS222C PLLMULT 1 0 PLLCLK CLKMODE0 CLKMODE1 CLKIN C2 C1 EMI filter 3.3 V /2 /8 /4 /6 00 01 10 CPU Clock Peripheral Bus, EDMA Clock Timer Internal Clock CLKOUT4, Peripheral Clock (AUXCLK for McASP), McBSP Internal Clock CLKOUT6 /2 /4 EMIF 00 01 10 EK2RATE (GBLCTL.[19,18]) ECLKOUT2 ECLKOUT1 PLL x6, x12 10 µF 0.1 µF AEA[20:19] (For the PLL Options, CLKMODE Pins Setup, and PLL Clock Frequency Ranges, see Table 9.) Internal to DM641/DM640 PLLV ECLKIN NOTES: A. Place all PLL external components (C1, C2, and the EMI Filter) as close to the C6000 DSP device as possible. For the best performance, TI recommends that all the PLL external components be on a single side of the board without jumpers, switches, or components other than the ones shown. B. For reduced PLL jitter, maximize the spacing between switching signals and the PLL external components (C1, C2, and the EMI Filter). C. The 3.3-V supply for the EMI filter must be from the same 3.3-V power plane supplying the I/O voltage, DVDD. D. EMI filter manufacturer TDK part number ACF451832-333, -223, -153, -103. Panasonic part number EXCCET103U. Figure 4−10. External PLL Circuitry for Either PLL Multiply Modes or x1 (Bypass) Mode |
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