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TMS320DM641 датащи(PDF) 98 Page - Texas Instruments

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номер детали TMS320DM641
подробное описание детали  Video/Imaging Fixed-Point Digital Signal Processors
PDF  171 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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TMS320DM641 датащи(HTML) 98 Page - Texas Instruments

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Reset
98
June 2003 − Revised August 2004
SPRS222C
AECLKOUT2
17
14
1
CLKOUT4
CLKOUT6
RESET
AECLKIN
Boot and Device
Configuration Inputs§
16
15
3
2
10
8
11
9
7
6
13
12
AECLKOUT1
5
4
Low Group†
Z Group†‡
EMIF Z Group†‡
EMIF High Group†
EMIF Low Group†
† EMIF Z group consists of:
AEA[22:3], AED[31:0], ACE[3:0], ABE[3:0], AARE/ASDCAS/ASADS/ASRE,AAWE/ASDWE/ASWE,
AAOE/ASDRAS/ASOE, ASOE3, ASDCKE, and APDT.
EMIF high group consists of: AHOLDA (when the corresponding AHOLD input is high)
EMIF low group consists of:
ABUSREQ; AHOLDA (when the corresponding AHOLD input is low)
Low group consists of:
Z group consists of:
HD[15:0], VP0D[0]/CLKX0, VP0D[1]/FSX0, VP0D[2]/DX0, CLKR0, VP0D[5]/FSR0, TOUT0, TOUT1, VDAC,
GP0[7:0], HR/W, HDS2, HDS1, HCS, HCNTL1, HAS, HCNTL0, HHWIL (16-bit HPI mode only), HRDY, HINT, and
VP0D[4,3].
VP1 signals apply to DM641 only:
VP1D[0]/CLKX1, VP1D[1]/FSX1, VP1D[2]/DX1, VP1D[6]/CLKR1, VP1D[5]/FSR1, and VP1D[4,3].
‡ If AEA[22:19], LENDIAN, and HD5 pins are actively driven, care must be taken to ensure
no timing contention between parameters 6, 7, 14, 15, 16, and 17.
§ Boot and Device Configurations Inputs (during reset) include: AEA[22:19], LENDIAN, and HD5.
Figure 4−9. Reset Timing†



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