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TMS320DM641 датащи(PDF) 41 Page - Texas Instruments

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номер детали TMS320DM641
подробное описание детали  Video/Imaging Fixed-Point Digital Signal Processors
PDF  171 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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TMS320DM641 датащи(HTML) 41 Page - Texas Instruments

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Pin Assignments
41
June 2003 − Revised August 2004
SPRS222C
VP1D[0]/CLKX1
VP1D[1]/FSX1
VP1D[2]/DX1
VP1D[3]/CLKS1
VP1D[4]/DR1
VP1D[5]/FSR1
VP1D[6]/CLKR1
VP1D[7]
Capture/Display
Buffer
(2560 Bytes)
VP1CLK0
VP1CLK1
VP1CTL0
VP1CTL1
VP1CTL2
Timing and
Control Logic
Video Port 1 (VP1) [DM641 only]
Channel A†
† Channel A supports: BT.656 (8-bit) display pipeline mode and BT.656 (8-bit) capture pipeline mode [TSI (8-bit) capture
pipeline mode − currently not supported].
‡ For DM641, the same STCLK signal is used for both video ports (VP0 and VP1).
STCLK‡
Figure 1−6. Peripheral Signals (Continued)



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