TMS320DM641 datasheet(76/171 Pages) TI

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Device Configurations

June 2003 − Revised August 2004

SPRS222C

2.5

Multiplexed Pin Configurations

Multiplexed pins are pins that are shared by more than one peripheral and are internally multiplexed. Some

of these pins are configured by software, and the others are configured by external pullup/pulldown resistors

only at reset. Those muxed pins that are configured by software should not be programmed to switch

functionalities during run-time. Those muxed pins that are configured by external pullup/pulldown resistors

are mutually exclusive; only one peripheral has primary control of the function of these pins after reset.

Table 2−7 identifies the multiplexed pins on the DM641/DM640 device; shows the default (primary) function

and the default settings after reset; and describes the pins, registers, etc. necessary to configure specific

multiplexed functions.

Table 2−7. DM641/DM640 Device Multiplexed Pin Configurations

MULTIPLEXED PINS

DEFAULT

DESCRIPTION

NAME

NO.

DEFAULT

FUNCTION

DEFAULT

SETTING

DESCRIPTION

CLKOUT4/GP0[1]

CLKOUT4

GP1EN = 0 (disabled)

These pins are software-configurable. To use these pins as

GPIO pins, the GPxEN bits in the GPIO Enable Register and

the GPxDIR bits in the GPIO Direction Register must be

properly configured.

CLKOUT6/GP0[2]

CLKOUT6

GP2EN = 0 (disabled)

properly configured.

GPxEN = 1:

GPx pin enabled

GPxDIR = 0:

GPx pin is an input

GPxDIR = 1:

GPx pin is an output

VP1D[6]/CLKR1

AD8

Muxed on the DM641 device only

[The DM640 device does not support the VP1 peripheral;

VP1D[5]/FSR1

AC7

Muxed on the DM641 device only

[The DM640 device does not support the VP1 peripheral;

therefore, the McBSP1 peripheral pins are standalone

VP1D[4]/DR1

AD7

McBSP1

VP1EN bit = 0

(disabled)

therefore, the McBSP1 peripheral pins are standalone

peripheral functions, not muxed.]

VP1D[3]/CLKS1

AE7

McBSP1

functions

VP1EN bit = 0

(disabled)

MCBSP1EN bit = 1

peripheral functions, not muxed.]

By default, the McBSP1 peripheral, function is enabled upon

VP1D[2]/DX1

AC6

functions

MCBSP1EN bit = 1

(enabled)

By default, the McBSP1 peripheral, function is enabled upon

reset (MCBSP1EN bit = 1).

VP1D[1]/FSX1

AD6

(enabled)

reset (MCBSP1EN bit = 1).

To enable the Video Port 1 data pins, the VP1EN bit in the

VP1D[0]/CLKX1

AE6

To enable the Video Port 1 data pins, the VP1EN bit in the

PERCFG register must be set to a 1.

VP0D[6]/CLKR0

AE15

VP0D[5]/FSR0

AB16

VP0D[4]/DR0

AC16

McBSP0

VP0EN bit = 0

(disabled)

By default, the McBSP0 peripheral function is enabled upon

reset (MCBSP0EN bit = 1).

VP0D[3]/CLKS0

AD16

McBSP0

functions

VP0EN bit = 0

(disabled)

MCBSP0EN bit = 1

By default, the McBSP0 peripheral function is enabled upon

reset (MCBSP0EN bit = 1).

To enable the Video Port 0 data pins, the VP0EN bit in the

VP0D[2]/DX0

AE16

functions

MCBSP0EN bit = 1

(enabled)

To enable the Video Port 0 data pins, the VP0EN bit in the

PERCFG register must be set to a 1.

VP0D[1]/FSX0

AF16

(enabled)

PERCFG register must be set to a 1.

VP0D[0]/CLKX0

AF17

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