DP83907 datasheet(11/70 Pages) NSC

11 / 70 page

40 Functional Description (Continued)

On a remote read the DP83907 moves data from its internal

memory map to the IO port and the host system reads it by

using an ‘‘INW’’ or ‘‘INSW’’ instruction from the IO address

of the data transfer port If the system attempts to read the

port before DP83907 has written the next word of data to it

DP83907 will insert wait states into the system cycle using

the CHRDY line DP83907 will not begin the next memory

read until the previous word of data has been read

On a remote write the system writes data to the IO port

using an ‘‘OUTW’’ or ‘‘OUTSW’’ instruction and DP83907

moves it to its buffer memory If the system attempts to

write to the port before DP83907 has moved the data to

memory DP83907 will insert wait states into the system cy-

cle using the CHRDY line DP83907 will not begin the next

memory write until a new word has been written to the IO

port

Addresses 00H to 1FH are specified as the PROM space

for compatibility with the NE2000 Architecture This is actu-

ally an array of 8-bit registers which are loaded from an

external EEPROM after DP83907 is initialized by an ISA RE-

SET They should contain the same data as the PROM did

in the NE2000 Architecture and in the same format To

transfer the data out the user must initiate a 16-bit DMA

read transfer and discard the most significant byte of data

on each transfer

At address 00H of the PROM is a six byte Ethernet address

for this node The upper two addresses of the PROM store

contain bytes which identify whether the DP83907 is in 8-bit

or 16-bit mode For 16-bit mode these bytes both contain

the value 57H for 8-bit mode they both contain 42H

8-BIT IO PORT COMPATIBLE MODE

This mode is compatible with the 8-bit mode offered by No-

vells NE2000 Architecture The NE2000 automatically de-

tects whether it is in an 8-bit or 16-bit slot and configures

itself appropriately As explained in the previous para-

graphs the user can determine whether the board is in 8-bit

or 16-bit mode by reading the PROM In 8-bit mode only

8 Kbytes of RAM are addressable as in the 8-bit mode of

the NE2000 Architecture The IO map is the same as the

16-bit mode the memory map is shown in

Figure 5 Again

the PROM has only a partial decode so is mirrored at all

addresses up to 4000H The PROM still occupies 32 bytes

of address space although it only has 16 bytes of data as

the data at all odd address locations is merely a mirror of

the data at the previous even address location

A low cost card using only one 8 Kbyte RAM can be de-

signed If the function on MSA9 is left unconnected then

the DP83907 will always operate in 8-bit mode regardless

of the slot the board is in

0000h

PROM

0020h

Aliased PROM

4000h

8k x 8 BUFFER RAM

6000h

RESERVED

7FFFh

(a)

D15

1Eh

42h

1Ch

42h

RESERVED

0Ah

E’net Address 5

08h

E’net Address 4

06h

E’net Address 3

04h

E’net Address 2

02h

E’net Address 1

00h

E’net Address 0

(b)

FIGURE 5 a) 8-Bit NIC Core’s Memory Map

b) 8-Bit PROM Map

42 POWER ON RESET OPERATION

The DP83907 configures itself after a Reset signal is ap-

plied To be recognized as a valid Power-On-Reset the Re-

set signal must be active for at least 415 ms

Figure 6 shows

how the RESET circuitry operates

TLF12082 – 6

FIGURE 6 RESET Operation

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