DP83907 datasheet(4/70 Pages) NSC

4 / 70 page

20 Pin Description

Pin No

Pin Name

Type

Description

ISA BUS INTERFACE PINS

119 – 127

SA0 – SA9

LATCHED ADDRESS BUS

Low-order 10 bits of the system’s latched 20-bit address

bus These bits are used to decode accesses to the DP83907’s IO map

132

TTL

1 – 7

SA13 – SA19

LATCHED ADDRESS BUS

7 bits of the system’s latched 20-bit address bus that are

used to decode accesses to the DP83907’s boot PROM

TTL

10 11

SMRD

BOOT PROM STROBES

These inputs are used to access the BOOT PROM

SMWR

TTL

15 16 18

SD0 – SD7

SYSTEM DATA BUS

16-bit system data bus Used to transfer data between the

system and the DP83907

19 21 22

SD8 – SD15

3ST

24 25 98

99 101 102

104 105 107

108

118

IOCS16

16 BIT IO TRANSFER

This signal indicates that the DP83907 is responding to a 16-

bit IO access by driving 16 bits of data on the bus

OCH

IOWR

IO WRITE STROBE

Strobe from system to write to the DP83907’s IO map

TTL

IORD

IO READ STROBE

Strobe from system to read from the DP83907’s IO map

TTL

RESET

This signal is output by the system to reset all devices on the bus

TTL

CHRDY

CHANNEL READY

This signal is used to insert wait states into system accesses

OCH

AEN

DMA ACTIVE

This signal indicates that the systems DMA has control of the bus

TTL

29 111

IRQ3 4 5 9 10

INTERRUPT REQUEST

The operation of these outputs is determined by

Configuration Register A

112 114

11 12 15

3ST

115 128

129 130

Note

Driver Types are I e Input O e Output IO e Bi-directional Output OCH e Open Collector 3ST e TRI-STATE

Output TTL e TTL Compatible

AUI e Attachment Unit Interface TPI e Twisted Pair Interface LED e LED Drive MOS e CMOS Level Compatible XTAL e Crystal

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