TUSB3410 datasheet(15/92 Pages) TI

15 / 92 page

2–3

Table 2–1. Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

CLKOUT

Clock output (controlled by CLKOUTEN and CLKSLCT in MODECNFG register (see Section 5.1.5

and Note 1)

CTS

UART: Clear to send (see Note 4)

DCD

UART: Data carrier detect (see Note 4)

I/O

Upstream USB port differential data minus

I/O

Upstream USB port differential data plus

DSR

UART: Data set ready (see Note 4)

DTR

UART: Data terminal ready (see Note 1)

GND

8, 18, 28

GND

Digital ground

P3.0

I/O

Port-3.0 (see Notes 3, 4, 5, and 8)

P3.1

I/O

Port-3.1 (see Notes 3, 4, 5, and 8)

P3.3

I/O

Port-3.3 (see Notes 3, 4, 5, and 8)

P3.4

I/O

Port-3.4 (see Notes 3, 4, 5, and 8)

PUR

Pull-up resistor connection (see Note 2)

RESET

Controller master reset signal (see Note 4)

RI/CP

UART: Ring indicator (see Note 4)

RTS

UART: Request to send (see Note 1)

SCL

Master I2C controller: clock signal (see Note 1)

SDA

I/O

Master I2C controller: data signal (see Notes 1 and 5)

SIN/IR_SIN

UART: Serial input data / IR Serial data input (see Note 6)

SOUT/IR_SOUT

UART: Serial output data / IR Serial data output (see Note 7)

SUSPEND

Suspend condition signal (see Note 3)

TEST0

Test input (for factory test only) (see Note 5)

TEST1

Test input (for factory test only) (see Note 5)

VCC

3, 25

PWR

3.3 V

VDD18

PWR

1.8-V Supply. An internal voltage regulator generates this supply voltage when terminal VREGEN

is asserted. When VREGEN is deasserted, 1.8 V must be supplied externally.

VREGEN

This active-low terminal is used to enable the 3.3-V to 1.8-V voltage regulator in the core.

WAKEUP

Remote wake-up request pin. When low, wakes up system (see Note 5)

X1/CLKI

12-MHz crystal input or clock input

12-MHz crystal output

NOTES:

1. 3-state CMOS output (

±4-mA drive/sink)

2. 3-state CMOS output (

±8-mA drive/sink)

3. 3-state CMOS output (

±12-mA drive/sink)

4. TTL-compatible, hysteresis input

5. TTL-compatible, hysteresis input, with internal 100-

µA active pullup

6. TTL-compatible input without hysteresis, with internal 100-

µA active pullup

7. Normal or IR mode: 3-state CMOS output (

±4-mA drive/sink)

8. The MCU treats the outputs as open drain types in that the output can be driven low continuously, but a high output is driven for two

clock cycles and then the output is tristated.

TUSB3410 датащи(PDF) 15 Page - Texas Instruments

TUSB3410 датащи(HTML) 15 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

датащи скачать

ссылки URL