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PM0056 датащи(PDF) 50 Page - STMicroelectronics |
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PM0056 датащи(HTML) 50 Page - STMicroelectronics |
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50 / 156 page ![]() The Cortex-M3 instruction set PM0056 50/156 DocID15491 Rev 5 3.2 Intrinsic functions ANSI cannot directly access some Cortex-M3 instructions. This section describes intrinsic functions that can generate these instructions, provided by the CMIS and that might be provided by a C compiler. If a C compiler does not support an appropriate intrinsic function, you might have to use an inline assembler to access some instructions. The CMSIS provides the intrinsic functions listed in Table 21 to generate instructions that ANSI cannot directly access. WFE — Wait for event — 3.9.11 on page 103 WFI — Wait for interrupt — 3.9.12 on page 104 Table 20. Cortex-M3 instructions (continued) Mnemonic Operands Brief description Flags Section Table 21. CMSIS intrinsic functions to generate some Cortex-M3 instructions Instruction CMSIS intrinsic function CPSIE I void __enable_irq(void) CPSID I void __disable_irq(void) CPSIE F void __enable_fault_irq(void) CPSID F void __disable_fault_irq(void) ISB void __ISB(void) DSB void __DSB(void) DMB void __DMB(void) REV uint32_t __REV(uint32_t int value) REV16 uint32_t __REV16(uint32_t int value) REVSH uint32_t __REVSH(uint32_t int value) RBIT uint32_t __RBIT(uint32_t int value) SEV void __SEV(void) WFE void __WFE(void) WFI void __WFI(void) |
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