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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PM0056 датащи(PDF) 84 Page - STMicroelectronics |
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PM0056 датащи(HTML) 84 Page - STMicroelectronics |
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84 / 156 page  The Cortex-M3 instruction set PM0056 84/156 DocID15491 Rev 5 Operation The MUL instruction multiplies the values from Rn and Rm, and places the least significant 32 bits of the result in Rd. The MLA instruction multiplies the values from Rn and Rm, adds the value from Ra, and places the least significant 32 bits of the result in Rd. The MLS instruction multiplies the values from Rn and Rm, subtracts the product from the value from Ra, and places the least significant 32 bits of the result in Rd. The results of these instructions do not depend on whether the operands are signed or unsigned. Restrictions In these instructions, do not use SP and do not use PC. If you use the S suffix with the MUL instruction: • Rd, Rn, and Rm must all be in the range R0 to R7 • Rd must be the same as Rm • You must not use the cond suffix Condition flags If S is specified, the MUL instruction: • Updates the N and Z flags according to the result • Does not affect the C and V flags Examples MULR10, R2, R5; multiply, R10 = R2 x R5 MLAR10, R2, R1, R5; multiply with accumulate, R10 = (R2 x R1) + R5 MULSR0, R2, R2; multiply with flag update, R0 = R2 x R2 MULLTR2, R3, R2; conditionally multiply, R2 = R3 x R2 MLSR4, R5, R6, R7; multiply with subtract, R4 = R7 - (R5 x R6) |
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