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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PM0056 датащи(PDF) 86 Page - STMicroelectronics |
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PM0056 датащи(HTML) 86 Page - STMicroelectronics |
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86 / 156 page  The Cortex-M3 instruction set PM0056 86/156 DocID15491 Rev 5 3.6.3 SDIV and UDIV Signed divide and unsigned divide. Syntax SDIV{cond} {Rd,} Rn, Rm UDIV{cond} {Rd,} Rn, Rm where: • ‘cond’ is an optional condition code (see Conditional execution on page 57) • ‘Rd’ is the destination register. If Rd is omitted, the destination register is Rn • ‘Rn,’ is the register holding the value to be divided • ‘Rm’ is a register holding the divisor Operation SDIV performs a signed integer division of the value in Rn by the value in Rm. UDIV performs an unsigned integer division of the value in Rn by the value in Rm. For both instructions, if the value in Rn is not divisible by the value in Rm, the result is rounded towards zero. Restrictions Do not use either SP or PC. Condition flags These instructions do not change the flags. Examples SDIVR0, R2, R4; signed divide, R0 = R2/R4 UDIVR8, R8, R1; unsigned divide, R8 = R8/R1 |
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