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PM0056 датащи(PDF) 57 Page - STMicroelectronics |
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PM0056 датащи(HTML) 57 Page - STMicroelectronics |
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57 / 156 page ![]() DocID15491 Rev 5 57/156 PM0056 The Cortex-M3 instruction set 3.3.7 Conditional execution Most data processing instructions can optionally update the condition flags in the application program status register (APSR) according to the result of the operation (see Application program status register on page 17). Some instructions update all flags, and some only update a subset. If a flag is not updated, the original value is preserved. See the instruction descriptions for the flags they affect. You can execute an instruction conditionally, based on the condition flags set in another instruction: • Immediately after the instruction that updated the flags • After any number of intervening instructions that have not updated the flags Conditional execution is available by using conditional branches or by adding condition code suffixes to instructions. See Table 23: Condition code suffixes on page 58 for a list of the suffixes to add to instructions to make them conditional instructions. The condition code suffix enables the processor to test a condition based on the flags. If the condition test of a conditional instruction fails, the instruction: • Does not execute • Does not write any value to its destination register • Does not affect any of the flags • Does not generate any exception Conditional instructions, except for conditional branches, must be inside an If-then instruction block. See IT on page 94 for more information and restrictions when using the IT instruction. Depending on the vendor, the assembler might automatically insert an IT instruction if you have conditional instructions outside the IT block. Use the CBZ and CBNZ instructions to compare the value of a register against zero and branch on the result. This section describes: • The condition flags • Condition code suffixes on page 58 The condition flags The APSR contains the following condition flags: • N: Set to 1 when the result of the operation is negative, otherwise cleared to 0 • Z: Set to 1 when the result of the operation is zero, otherwise cleared to 0 • C: Set to 1 when the operation results in a carry, otherwise cleared to 0. • V: Set to 1 when the operation causes an overflow, otherwise cleared to 0. For more information about the APSR see Program status register on page 16. A carry occurs: • If the result of an addition is greater than or equal to 232 • If the result of a subtraction is positive or zero • As the result of an inline barrel shifter operation in a move or logical instruction Overflow occurs if the result of an add, subtract, or compare is greater than or equal to 231, or less than -231. |
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