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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PM0056 датащи(PDF) 55 Page - STMicroelectronics |
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PM0056 датащи(HTML) 55 Page - STMicroelectronics |
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55 / 156 page  DocID15491 Rev 5 55/156 PM0056 The Cortex-M3 instruction set Note: 1 If n is 32 or more, then all the bits in the result are cleared to 0. 2 If n is 33 or more and the carry flag is updated, it is updated to 0. Figure 15. LSL#3 ROR Rotate right by n bits moves the left-hand 32-n bits of the register Rm, to the right by n places, into the right-hand 32-n bits of the result. It also moves the right-hand n bits of the register into the left-hand n bits of the result (see Figure 16). When the instruction is RORS or when ROR #n is used in operand2 with the instructions MOVS, MVNS, ANDS, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to the last bit rotation, bit[n-1], of the register Rm. Note: 1 If n is 32, then the value of the result is same as the value in Rm, and if the carry flag is updated, it is updated to bit[31] of Rm. 2 ROR with shift length, n, more than 32 is the same as ROR with shift length n-32. Figure 16. ROR #3 RRX Rotate right with extend moves the bits of the register Rm to the right by one bit. And it copies the carry flag into bit[31] of the result (see Figure 17). When the instruction is RRXS or when RRX is used in operand2 with the instructions MOVS, MVNS, ANDS, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to bit[0] of the register Rm. 31 10 Carry Flag ... 0 0 0 2 3 4 5 31 10 Carry Flag ... 2 3 4 5 |
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