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PM0056 датащи(PDF) 60 Page - STMicroelectronics

номер детали PM0056
подробное описание детали  This programming manual provides information
PDF  156 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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PM0056 датащи(HTML) 60 Page - STMicroelectronics

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The Cortex-M3 instruction set
PM0056
60/156
DocID15491 Rev 5
3.4
Memory access instructions
Table 24 shows the memory access instructions:
3.4.1
ADR
Load PC-relative address.
Syntax
ADR{cond} Rd, label
where:
•
‘cond’ is an optional condition code (see Conditional execution on page 57)
•
‘Rd’ is the destination register
•
‘label’ is a PC-relative expression (see PC-relative expressions on page 56)
Operation
ADR determines the address by adding an immediate value to the PC. It writes the result to
the destination register.
ADR produces position-independent code, because the address is PC-relative.
If you use ADR to generate a target address for a BX or BLX instruction, you must ensure
that bit[0] of the address you generate is set to1 for correct execution.
Values of label must be within the range -4095 to 4095 from the address in the PC.
Table 24. Memory access instructions
Mnemonic
Brief description
Section
ADR
Load PC-relative address
ADR on page 60
CLREX
Clear exclusive
CLREX on page 71
LDM{mode}
Load multiple registers
LDM and STM on page 67
LDR{type}
Load register using immediate offset
LDR and STR, immediate offset on page 61
LDR{type}
Load register using register offset
LDR and STR, register offset on page 63
LDR{type}T
Load register with unprivileged access
LDR and STR, unprivileged on page 64
LDR
Load register using PC-relative address LDR, PC-relative on page 65
LDREX{type} Load register exclusive
LDREX and STREX on page 70
POP
Pop registers from stack
PUSH and POP on page 68
PUSH
Push registers onto stack
PUSH and POP on page 68
STM{mode}
Store multiple registers
LDM and STM on page 67
STR{type}
Store register using immediate offset
LDR and STR, immediate offset on page 61
STR{type}
Store register using register offset
LDR and STR, register offset on page 63
STR{type}T
Store register with unprivileged access LDR and STR, unprivileged on page 64
STREX{type} Store register exclusive
LDREX and STREX on page 70



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