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AN4192 датащи(PDF) 42 Page - STMicroelectronics

номер детали AN4192
подробное описание детали  In the latest generation of CPUs for modern desktop and notebook platforms
PDF  47 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN4192 датащи(HTML) 42 Page - STMicroelectronics

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Low-side FET selection
AN4192
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Doc ID 023820 Rev 1
3.6
Phase node spike - VCORE relationship
Let's consider the impact of a different output voltage on the phase node ringing. In
Figure 53 the schematic of a 3-phase synchronous buck converter (VIN = 12 V, VOUT = 1.25
V, fSW = 270 kHz, 2 x HS, 2 x LS, IOUT = 75 A) is depicted. External gate resistances are
connected to HS (2.2
Ω) and LS (2.2 Ω) FETs. An RC snubber network (RSNUB = 2.2 Ω,
CSNUB = 4.7 nF) is used to smooth the phase node.
Figure 53.
3-phase synchronous buck converter
Adjusting a 6-pin DIP switch configuration, it is possible to change the converter output
voltage, from 2.5 V to 3.3 V. In Figure 54 and 55, the relevant waveforms are reported.
AM16461V1



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