REV. 0

ADE7754

–35–

Operational Mode Register (0Ah)

The general configuration of the ADE7754 is defined by writing to the OPMODE register. Table IX summarizes the functionality of

each bit in the OPMODE register.

Table IX. OPMODE Register

Bit

Bit

Default

Location Mnemonic

Value

Description

0

DISHPF

0

The HPFs (high-pass filters) in all current channel inputs are disabled when this bit is set.

1

DISLPF

0

The LPFs (low-pass filters) in all current channel inputs are disabled when this bit is set.

2

DISCF

1

The frequency output CF is disabled when this bit is set.

3-5

DISMOD

0

By setting these bits, ADE7754’s A/D converters can be turned off. In normal operation, these

bits should be left at Logic 0.

DISMOD2 DISMOD1 DISMOD0

000

Normal operation.

100

Normal operation. By setting this bit to Logic 1, the analog

inputs to current channel are connected to the ADC for voltage

channel and the analog inputs to voltage channel are connected

to the ADC for current channel.

001

Current channel A/D converters off.

101

Current channel A/D converters off + channels swapped.

010

Voltage Channel A/D converters off.

110

Voltage Channel A/D converters off + channels swapped.

011

ADE7754 in sleep mode.

111

ADE7754 powered down.

6SWRST

0

Software Chip Reset. A data transfer to the ADE7754 should not take place for at least 18

µs

after a software reset.

7

RESERVED

This is intended for factory testing only and should be left at 0.