S25FS256S datasheet(14/154 Pages) SPANSION

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S25FS-S Family

S25FS-S_00_04 November 6, 2013

Data

Sheet

(Pre limin ar y)

2.2.2

Known Differences from Prior Generations

2.2.2.1

Error Reporting

FL-K and FL-P memories either do not have error status bits or do not set them if program or erase is

attempted on a protected sector. The FS-S and FL-S families do have error reporting status bits for program

and erase operations. These can be set when there is an internal failure to program or erase, or when there is

an attempt to program or erase a protected sector. In these cases the program or erase operation did not

complete as requested by the command. The P_ERR or E_ERR bits and the WIP bit will be set to and

remain 1 in SR1V. The clear Status Register command must be sent to clear the errors and return the device

to standby state.

2.2.2.2

Secure Silicon Region (OTP)

The FS-S size and format (address map) of the One-Time Program area is different from FL-K and FL-P

generations. The method for protecting each portion of the OTP area is different. For additional details see

Secure Silicon Region (OTP) on page 76.

2.2.2.3

Configuration Register Freeze Bit

The Configuration Register 1 Freeze bit CR1V[0], locks the state of the Block Protection bits (SR1NV[4:2] and

SR1V[4:2]), TBPARM_O bit (CR1NV[2]), and TBPROT_O bit (CR1NV[5]), as in prior generations. In the

FS-S and FL-S families the Freeze bit also locks the state of the Configuration Register 1 BPNV_O bit

(CR1NV[3]), and the Secure Silicon Region (OTP) area.

2.2.2.4

Sector Erase Commands

The command for erasing a 4-kbyte sector is supported only for use on 4-kbyte parameter sectors at the top

or bottom of the FS-S device address space.

The command for erasing an 8-kbyte area (two 4-kbyte sectors) is not supported.

The command for erasing a 32-kbyte area (eight 4-kbyte sectors) is not supported.

The Sector Erase command (SE) for FS-S 64-kbyte sectors is supported when the configuration option for

uniform 64-kbyte sector is selected or, when the hybrid configuration option for 4-kbyte parameter sectors

with 64-kbyte uniform sectors is used. When the hybrid option is in use, the 64-kbyte erase command may be

used to erase the 32-kbyte of address space adjacent to the group of eight 4-kbyte sectors. The 64-kbyte

erase command in this case is erasing the 64-kbyte sector that is partially overlaid by the group of eight

4-kbyte sectors without affecting the 4-kbyte sectors. This provides erase control over the 32 kbytes of

address space without also forcing the erase of the 4-kbyte sectors. This is different behavior than

implemented in the FL-S family. In the FL-S family, the 64-kbyte Sector Erase command can be applied to a

64-kbyte block of 4-kbyte sectors to erase the entire block of parameter sectors in a single operation. In the

FS-S, the parameter sectors do not fill an entire 64-kbyte block so only the 4-kbyte Parameter Sector Erase

(20h) is used to erase parameter sectors.

The erase command for a 256-kbyte sector replaces the 64-kbyte erase command when the configuration

option for 256-kbyte uniform logical sectors is used.

2.2.2.5

Deep Power-Down

The Deep Power-Down (DPD) function is not supported in the FS-S and FL-S family devices.

2.2.2.6

WRR Single Register Write

In some legacy SPI devices, a Write Registers (WRR) command with only one data byte would update Status

unintended exit from Quad Mode. The S25FS-S family only updates Status Register 1 when a single data

byte is provided. The Configuration Register 1 is not modified in this case.

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