OR4E2 datasheet(74/124 Pages) AGERE

74 / 124 page

Lucent Technologies Inc.

Preliminary Data Sheet

December 2000

ORCA Series 4 FPGAs

Electrical Characteristics (continued)

Table 41. Electrical Characteristics (continued)

* The pull-up resistor will externally pull the pin to a level 1.0 V below VDDIO.

Parameter

Symbol

Test Conditions

Min

Max

Unit

Data Retention Voltage

(VDD33)

VDR

TA = 25 °C2.3

—

Input Capacitance

CIN

TA = 25 °C, VDD = 3.3 V

Test frequency = 1 MHz

—

6pF

Output Capacitance

COUT

TA = 25 °C, VDD = 3.3 V

Test frequency = 1 MHz

—

6pF

DONE Pull-up Resistor*

RDONE

—

100

—

Ω

M[3:0] Pull-up Resistor*

—

100

—

Ω

I/O Pad Static Pull-up

Current*

IPU

VDDIO = 3.6 V, VIN = VSS, TA = 0 °C

14.4

50.9

µA

I/O Pad Static

Pull-down Current

IPD

VDDIO = 3.6 V, VIN = VSS, TA = 0 °C

103

µA

I/O Pad Pull-up Resistor*

RPU

VDDIO = all, VIN = VSS, TA = 0 °C

100

—

Ω

I/O Pad Pull-down

Resistor

RPD

VDDIO = all, VIN = VDD, TA = 0 °C50

—

Ω

DONE Pull-up Resistor*

RDONE

—

100

—

Ω

M[3:0] Pull-up Resistor*

—

100

—

Ω

I/O Pad Static Pull-up

Current*

IPU

VDDIO = 3.6 V, VIN = VSS, TA = 0 °C

14.4

50.9

µA

I/O Pad Static

Pull-down Current

IPD

VDDIO = 3.6 V, VIN = VSS, TA = 0 °C

103

µA

I/O Pad Pull-up

Resistor*

RPU

VDDIO = all, VIN = VSS, TA = 0 °C

100

—

Ω

I/O Pad Pull-down

Resistor

RPD

VDDIO = all, VIN = VDD, TA = 0 °C50

—

Ω

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