поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

MFRC63002R датащи(PDF) 92 Page - NXP Semiconductors

номер детали MFRC63002R
подробное описание детали  Contactless reader IC
PDF  118 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

MFRC63002R датащи(HTML) 92 Page - NXP Semiconductors

Back Button MFRC63002R Datasheet HTML 88Page - NXP Semiconductors MFRC63002R Datasheet HTML 89Page - NXP Semiconductors MFRC63002R Datasheet HTML 90Page - NXP Semiconductors MFRC63002R Datasheet HTML 91Page - NXP Semiconductors MFRC63002R Datasheet HTML 92Page - NXP Semiconductors MFRC63002R Datasheet HTML 93Page - NXP Semiconductors MFRC63002R Datasheet HTML 94Page - NXP Semiconductors MFRC63002R Datasheet HTML 95Page - NXP Semiconductors MFRC63002R Datasheet HTML 96Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 92 / 118 page
background image
MFRC630
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.1 — 6 September 2012
227531
92 of 118
NXP Semiconductors
MFRC630
Contactless reader IC
9.13.4 PLLDiv_Out
Table 164. PLL_Ctrl register bits
Bit
Symbol
Description
7 to 4
CLkOutSel
• 0h - pin CLKOUT is used as I/O
• 1h - pin CLKOUT shows the output of the analog PLL
• 2h - pin CLKOUT is hold on 0
• 3h - pin CLKOUT is hold on 1
• 4h - pin CLKOUT shows 27.12 MHz from the crystal
• 5h - pin CLKOUT shows 13.56 MHz derived from the crystal
• 6h - pin CLKOUT shows 6.78 MHz derived from the crystal
• 7h - pin CLKOUT shows 3.39 MHz derived from the crystal
• 8h - pin CLKOUT is toggled by the Timer0 overflow
• 9h - pin CLKOUT is toggled by the Timer1 overflow
• Ah - pin CLKOUT is toggled by the Timer2 overflow
• Bh - pin CLKOUT is toggled by the Timer3 overflow
• Ch...Fh - RFU
3
ClkOut_En
Enables the clock at Pin CLKOUT
2
PLL_PD
PLL power down
1-0
PLLDiv_FB
PLL feedback divider (see table 174)
Table 165. Setting of feedback divider PLLDiv_FB [1:0]
Bit 1
Bit 0
Division
0
0
23 (VCO frequency 312Mhz)
0
1
27 (VCO frequency 366MHz)
1
0
28 (VCO frequency 380Mhz)
1
1
23 (VCO frequency 312Mhz)
Table 166. PLLDiv_Out register (address 3Eh)
Bit
7
6
5
4
3
2
1
0
Symbol
PLLDiv_Out
Access
rights
r/w
Table 167. PLLDiv_Out bits
Bit
Symbol
Description
7 to 0
PLLDiv_Out
PLL output divider factor; Refer to Section 8.8.2
Table 168. Setting for the output divider ratio PLLDiv_Out [7:0]
Value
Division
0RFU
1RFU
2RFU
3RFU
4RFU



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com