MFRC63002R datasheet(91/118 Pages) NXP

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MFRC630

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Product data sheet

COMPANY PUBLIC

Rev. 3.1 — 6 September 2012

227531

91 of 118

NXP Semiconductors

MFRC630

Contactless reader IC

9.13.2 LPO_Trimm

9.13.3 PLL_Ctrl Register

The PLL_Ctrl register implements the control register for the IntegerN PLL. Two stages

exist to create the ClkOut signal from the 27,12MHz input. In the first stage the 27,12Mhz

input signal is multiplied by the value defined in PLLDiv_FB and divided by two, and the

second stage divides this frequency by the value defined by PLLDIV_Out.

Table 160. RS232 speed settings

Transfer speed (kbit/s)

SerialSpeed register content (Hex.)

7,2

9,6

14,4

19,2

38,4

57,6

115,2

128,0

230,4

460,8

921,6

1228,8

Table 161. LPO_Trim register (address 3Ch)

Bit

Symbol

lpo_trimm

Access

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Table 162. LPO_Trim bits

Bit

Symbol

Description

7 to 0

lpo_trimm

Trimm value. Refer to Section 8.8.3 “Low-Power Oscillator (LPO)”

Note: If the trimm value is increased, the frequency of the oscillator

decreases.

Table 163. PLL_Ctrl register (address3Dh)

Bit

Symbol

ClkOutSel

ClkOut_En

PLL_PD

PLLDiv_FB

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