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MFRC63002R датащи(PDF) 89 Page - NXP Semiconductors |
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MFRC63002R датащи(HTML) 89 Page - NXP Semiconductors |
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89 / 118 page ![]() MFRC630 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.1 — 6 September 2012 227531 89 of 118 NXP Semiconductors MFRC630 Contactless reader IC 9.12.5 Rcv 9.12.6 RxAna This register allows to set the gain (rcv_gain) and high pass corner frequencies (rcv_hpcf). Table 153. Rcv register (address 38h) Bit 7 6 5 4 3 2 1 0 Symbol Rcv_Rx_single Rx_ADCmode SigInSel RFU CollLevel Access rights r/w r/w r/w - r/w Table 154. Rcv bits Bit Symbol Description 7 Rcv_Rx_single Single RXP Input Pin Mode; 0: Fully Differential 1: Quasi-Differential 6 Rx_ADCmode Defines the operation mode of the Analog Digital Converter (ADC) 0: normal reception mode for ADC 1: LPCD mode for ADC 5 to 4 SigInSel Defines input for the signal processing unit: 0h - idle 1h - internal analog block (RX) 2h - signal in over envelope (ISO/IEC14443A) 3h - signal in over s3c-generic 3 to 2 RFU - 1 to 0 CollLevel Defines the strength of a signal to be interpreted as a collision: 0h - Collision has at least 1/8 of signal strength 1h - Collision has at least 1/4 of signal strength 2h - Collision has at least 1/2 of signal strength 3h - Collision detection is switched off Table 155. RxAna register (address 39h) Bit 7 6 5 4 3 2 1 0 Symbol VMid_r_sel RFU rcv_hpcf rcv_gain Access rights r/w - r/w r/w Table 156. RxAna bits Bit Symbol Description 7, 6 VMid_r_setl Factory trim value, needs to be 0. 5, 4 RFU 3, 2 rcv_hpcf The rcv_hpcf [1:0] signals allow 4 different settings of the base band amplifier lower cut-off frequency from ~40 kHz to ~300 kHz. 1 to 0 rcv_gain With rcv_gain[1:0] four different gain settings from 30 dB and 60 dB can be configured (differential output voltage/differential input voltage). |
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