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IMX53CEC датащи(PDF) 69 Page - Freescale Semiconductor, Inc

номер детали IMX53CEC
подробное описание детали  Applications Processors for Consumer Products
PDF  204 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

IMX53CEC датащи(HTML) 69 Page - Freescale Semiconductor, Inc

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Electrical Characteristics
i.MX53xD Applications Processors for Consumer Products, Rev. 2
Freescale Semiconductor
69
4.7.2.1
CSPI Master Mode Timing
Figure 32 depicts the timing of CSPI in master mode. Table 46 lists the CSPI master mode timing
characteristics.
Figure 32. CSPI/ECSPI Master Mode Timing Diagram
Table 45. CSPI Nomenclature and Routing
Block Instance
I/O Access
ECSPI-1
GPIO, KPP, DISP0_DAT, CSI0_DAT and EIM_D through IOMUXC
ECSPI-2
DISP0_DAT, CSI0_DAT and EIM through IOMUXC
CSPI
DISP0_DAT, EIM_A/D, SD1 and SD2 through IOMUXC
Table 46. CSPI Master Mode Timing Parameters
ID
Parameter
Symbol
Min
Max
Unit
CS1
SCLK Cycle Time
tclk
60
—
ns
CS2
SCLK High or Low Time
tSW
26
—
ns
CS3
SCLK Rise or Fall1
tRISE/FALL
——
ns
CS4
SSx pulse width
tCSLH
26
—
ns
CS5
SSx Lead Time (Slave Select setup
time)
tSCS
26
—
ns
CS6
SSx Lag Time (SS hold time)
tHCS
26
—
ns
CS7
MOSI Propagation Delay
(CLOAD =20 pF)
tPDmosi
–1
21
ns
CS8
MISO Setup Time
tSmiso
5—
ns
CS1
CS7
CS2
CS2
CS4
CS6
CS5
CS8
CS9
SCLK
SSx
MOSI
MISO
RDY
CS10
CS3
CS3



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