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PIC32MX795F512LT-80I/PF датащи(PDF) 137 Page - Microchip Technology

номер детали PIC32MX795F512LT-80I/PF
подробное описание детали  High-Performance, USB, CAN and Ethernet 32-bit Flash Microcontrollers
PDF  256 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC32MX795F512LT-80I/PF датащи(HTML) 137 Page - Microchip Technology

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© 2009-2011 Microchip Technology Inc.
DS61156G-page 137
PIC32MX5XX/6XX/7XX
14.0 TIMER2/3, TIMER4/5
This family of PIC32 devices features four synchronous
16-bit timers (default) that can operate as a free-
running interval timer for various timing applications
and counting external events. The following modes are
supported:
• Synchronous internal 16-bit timer
• Synchronous internal 16-bit gated timer
• Synchronous external 16-bit timer
Two 32-bit synchronous timers are available by
combining Timer2 with Timer3 and Timer4 with Timer5.
The 32-bit timers can operate in three modes:
• Synchronous internal 32-bit timer
• Synchronous internal 32-bit gated timer
• Synchronous external 32-bit timer
14.1
Additional Supported Features
• Selectable clock prescaler
• Timers operational during CPU idle
• Time base for Input Capture and Output Compare
modules (Timer2 and Timer3 only)
• ADC event trigger (Timer3 only)
• Fast bit manipulation using CLR, SET and INV
registers
FIGURE 14-1:
TIMER2/3, 4/5 BLOCK DIAGRAM (16-BIT)
Note 1:
This data sheet summarizes the features
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 14. “Timers”
(DS61105)
of
the
“PIC32
Family
Reference Manual”
, which is available
from
the
Microchip
web
site
(www.microchip.com/PIC32).
2:
Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
in
this data sheet for device-specific register
and bit information.
Note:
In this chapter, references to registers,
TxCON, TMRx and PRx, use ‘x’ to repre-
sent Timer2 through 5 in 16-bit modes. In
32-bit modes, ‘x’ represents Timer2 or 4;
‘y’ represents Timer3 or 5.
Sync
PRx
TxIF
Equal
Comparator x 16
TMRx
Reset
Event Flag
Q
Q
D
TGATE (TxCON<7>)
1
0
Gate
TxCK(2)
Sync
ON (TxCON<15>)
TGATE (TxCON<7>)
TCS (TxCON<1>)
TCKPS (TxCON<6:4>)
Prescaler
3
1, 2, 4, 8, 16,
32, 64, 256
x 1
1 0
0 0
PBCLK
Trigger(1)
ADC Event
Note 1: ADC event trigger is available on Timer3 only.
2: TxCK pins are not available on 64-pin devices.



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