PIC32MX795F512LT-80ISLASHPF datasheet(80/256 Pages) MICROCHIP

80 / 256 page

TABLE 4-12:

I2C2 REGISTER MAP FOR PIC32MX534F064L, PIC32MX564F064L, PIC32MX564F128L, PIC32MX575F256L,

PIC32MX575F512L, PIC32MX664F064L, PIC32MX664F128L, PIC32MX675F256L, PIC32MX675F512L, PIC32MX695F512L,

PIC32MX764F128L, PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES(1)

Bits

31/15

30/14

29/13

28/12

27/11

26/10

25/9

24/8

23/7

22/6

21/5

20/4

19/3

18/2

17/1

16/0

5400 I2C2CON

31:16

—

0000

15:0

FRZ

SIDL

SCLREL

STRICT

A10M

DISSLW

SMEN

GCEN

STREN

ACKDT

ACKEN

RCEN

PEN

RSEN

SEN

1000

5410 I2C2STAT

31:16

—

0000

15:0 ACKSTAT

TRSTAT

—

BCL

GCSTAT

ADD10

IWCOL

I2COV

D/A

R/W

RBF

TBF

0000

5420

I2C4DD

31:16

—

0000

15:0

—

ADD<9:0>

0000

5430 I2C2MSK

31:16

—

0000

15:0

—

MSK<9:0>

0000

5440 I2C2BRG

31:16

—

0000

15:0

—

Baud Rate Generator Register

0000

5450 I2C2TRN

31:16

—

0000

15:0

—

Transmit Register

0000

5460 I2C2RCV

31:16

—

0000

15:0

—

Receive Register

0000

Legend:

x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note 1:

All registers in this table except I2CxRCV have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers”

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