PIC32MX795F512LT-80ISLASHPF datasheet(83/256 Pages) MICROCHIP

83 / 256 page

TABLE 4-14:

SPI2, SPI3 AND SPI4 REGISTER MAP(1)

Bits

31/15

30/14

29/13

28/12

27/11

26/10

25/9

24/8

23/7

22/6

21/5

20/4

19/3

18/2

17/1

16/0

5800 SPI3CON

31:16

FRMEN

FRMSYNC FRMPOL

MSSEN FRMSYPW

FRMCNT<2:0>

—

SPIFE

ENHBUF 0000

15:0

FRZ

SIDL

DISSDO

MODE32

MODE16

SMP

CKE

SSEN

CKP

MSTEN

—

STXISEL<1:0>

SRXISEL<1:0>

0000

5810 SPI3STAT

31:16

—

RXBUFELM<4:0>

—

TXBUFELM<4:0>

0000

15:0

—

SPIBUSY

—

SPITUR

SRMT

SPIROV

SPIRBE

—SPITBE

—

SPITBF

SPIRBF

0008

5820 SPI3BUF

31:16

DATA<31:0>

0000

15:0

0000

5830 SPI3BRG

31:16

—

0000

15:0

—

—BRG<8:0>

0000

5A00 SPI2CON

31:16

FRMEN

FRMSYNC FRMPOL

MSSEN FRMSYPW

FRMCNT<2:0>

—

SPIFE

ENHBUF 0000

15:0

FRZ

SIDL

DISSDO

MODE32

MODE16

SMP

CKE

SSEN

CKP

MSTEN

—

STXISEL<1:0>

SRXISEL<1:0>

0000

5A10 SPI2STAT

31:16

—

RXBUFELM<4:0>

—

TXBUFELM<4:0>

0000

15:0

—

SPIBUSY

—

SPITUR

SRMT

SPIROV

SPIRBE

—SPITBE

—

SPITBF

SPIRBF

0008

5A20 SPI2BUF

31:16

DATA<31:0>

0000

15:0

0000

5A30 SPI2BRG

31:16

—

0000

15:0

—

—BRG<8:0>

0000

5C00 SPI4CON

31:16

FRMEN

FRMSYNC FRMPOL

MSSEN FRMSYPW

FRMCNT<2:0>

—

SPIFE

ENHBUF 0000

15:0

FRZ

SIDL

DISSDO

MODE32

MODE16

SMP

CKE

SSEN

CKP

MSTEN

—

STXISEL<1:0>

SRXISEL<1:0>

0000

5C10 SPI4STAT

31:16

—

RXBUFELM<4:0>

—

TXBUFELM<4:0>

0000

15:0

—

SPIBUSY

—

SPITUR

SRMT

SPIROV

SPIRBE

—SPITBE

—

SPITBF

SPIRBF

0008

5C20 SPI4BUF

31:16

DATA<31:0>

0000

15:0

0000

5C30 SPI4BRG

31:16

—

0000

15:0

—

—BRG<8:0>

0000

Legend:

x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note 1:

All registers in this table except SPIxBUF have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers”

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