PIC32MX795F512LT-80ISLASHPF datasheet(51/256 Pages) MICROCHIP

51 / 256 page

DS61156G-page 51

PIC32MX5XX/6XX/7XX

TABLE 3-1:

MIPS® M4K® CORE HIGH-PERFORMANCE INTEGER MULTIPLY/DIVIDE UNIT

LATENCIES AND REPEAT RATES

The MIPS architecture defines that the result of a

multiply or divide operation be placed in the HI and LO

registers. Using the Move-From-HI (MFHI) and Move-

From-LO (MFLO) instructions, these values can be

transferred to the General Purpose Register file.

In addition to the HI/LO targeted operations, the

MIPS32 architecture also defines a multiply instruction,

MUL, which places the least significant results in the pri-

mary register file instead of the HI/LO register pair. By

avoiding the explicit MFLO instruction required when

using the LO register, and by supporting multiple desti-

nation registers, the throughput of multiply-intensive

operations is increased.

Two other instructions, Multiply-Add (MADD) and

Multiply-Subtract (MSUB), are used to perform the

multiply-accumulate and multiply-subtract operations.

The MADD instruction multiplies two numbers and then

adds the product to the current contents of the HI and

LO registers. Similarly, the MSUB instruction multiplies

two operands and then subtracts the product from the

HI and LO registers. The MADD and MSUB operations

are commonly used in DSP algorithms.

3.2.3

SYSTEM CONTROL

COPROCESSOR (CP0)

In the MIPS architecture, CP0 is responsible for the

virtual-to-physical address translation, the exception

control system, the processor’s diagnostics capability,

the operating modes (Kernel, User and Debug) and

whether interrupts are enabled or disabled. Configura-

tion information, such as presence of options like

MIPS16e, is also available by accessing the CP0

registers, listed in Table 3-2.

Opcode

Operand Size (mul rt) (div rs)

Latency

Repeat Rate

MULT/MULTU, MADD/MADDU,

MSUB/MSUBU

16 bits

32 bits

MUL

16 bits

32 bits

DIV/DIVU

8 bits

16 bits

24 bits

32 bits

PIC32MX795F512LT-80I/PF датащи(PDF) 51 Page - Microchip Technology

PIC32MX795F512LT-80I/PF датащи(HTML) 51 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL