SC9RS08KA2 datasheet(95/134 Pages) FREESCALE

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Modulo Timer (RS08MTIMV1)

SC9RS08KA2 Series Data Sheet, Rev. 1

Freescale Semiconductor

11.4

Functional Description

The MTIM is composed of a main 8-bit up-counter with an 8-bit modulo register, a clock source selector,

and a prescaler block with nine selectable values. The module also contains software selectable interrupt

logic.

The MTIM counter (MTIMCNT) has three modes of operation: stopped, free-running, and modulo. Out

of reset, the counter is stopped. If the counter is started without writing a new value to the modulo register,

then the counter will be in free-running mode. The counter is in modulo mode when a value other than $00

is in the modulo register while the counter is running.

After any MCU reset, the counter is stopped and reset to $00, and the modulus is set to $00. The bus clock

is selected as the default clock source and the prescale value is divide by 1. To start the MTIM in

free-running mode, simply write to the MTIM status and control register (MTIMSC) and clear the MTIM

stop bit (TSTP).

Four clock sources are software selectable: the internal bus clock, the fixed frequency clock (XCLK), and

an external clock on the TCLK pin, selectable as incrementing on either rising or falling edges. The MTIM

clock select bits (CLKS) in MTIMCLK are used to select the desired clock source. If the counter is active

(TSTP = 0) when a new clock source is selected, the counter will continue counting from the previous

value using the new clock source.

Nine prescale values are software selectable: clock source divided by 1, 2, 4, 8, 16, 32, 64, 128, or 256.

The prescaler select bits (PS) in MTIMCLK select the desired prescale value. If the counter is active

(TSTP = 0) when a new prescaler value is selected, the counter will continue counting from the previous

value using the new prescaler value.

The MTIM modulo register (MTIMMOD) allows the overflow compare value to be set to any value from

$01 to $FF. Reset clears the modulo value to $00, which results in a free running counter.

When the counter is active (TSTP = 0), the counter increments at the selected rate until the count matches

the modulo value. When these values match, the counter overflows to $00 and continues counting. The

MTIM overflow flag (TOF) is set whenever the counter overflows. The flag sets on the transition from the

modulo value to $00. Writing to MTIMMOD while the counter is active resets the counter to $00 and

clears TOF.

Clearing TOF is a two-step process. The first step is to read the MTIMSC register while TOF is set. The

second step is to write a 0 to TOF. If another overflow occurs between the first and second steps, the

clearing process is reset and TOF will remain set after the second step is performed. This will prevent the

second occurrence from being missed. TOF is also cleared when a 1 is written to TRST or when any value

is written to the MTIMMOD register.

The MTIM allows for an optional interrupt to be generated whenever TOF is set. To enable the MTIM

overflow interrupt, set the MTIM overflow interrupt enable bit (TOIE) in MTIMSC. TOIE must never be

written to a 1 while TOF = 1. Instead, TOF must be cleared first, then the TOIE can be set to 1.

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