SC9RS08KA2 datasheet(75/134 Pages) FREESCALE

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SC9RS08KA2 Series Data Sheet, Rev. 1

Freescale Semiconductor

Chapter 9

Internal Clock Source (RS08ICSV1)

9.1

Introduction

The internal clock source (ICS) module provides clock source choices for the MCU. The module contains

a frequency-locked loop (FLL) as a clock source that is controllable by an internal reference clock. The

module can provide this FLL clock or the internal reference clock as a source for the MCU system clock,

ICSOUT.

Whichever clock source is chosen, ICSOUT is passed through a bus clock divider (BDIV), which allows

a lower final output clock frequency to be derived. ICSOUT is two times the bus frequency.

Figure 9-1 shows the SC9RS08KA2 Series block diagram with the ICS highlighted.

Figure 9-1. SC9RS08KA2 Series Block Diagram Highlighting ICS Block

RS08 CORE

USER RAM — 63 BYTES

NOTES:

(1) Pins are software configurable with pullup/pulldown device if input port.

(2) Integrated pullup device enabled if reset enabled (RSTPE=1).

(3) These pins are not available in 6-pin package

POWER AND

VSS

VDD

INTERNAL CLOCK

SOURCE

BDC

RS08 SYSTEM CONTROL

RTI

CPU

COP

WAKEUP

LVD

RESET AND STOP WAKEUP

MODES OF OPERATION

POWER MANAGEMENT

5-BIT KEYBOARD

INTERRUPT MODULE

PTA0/KBIP0/ACMP+ (1)

PTA1/KBIP1/ACMP- (1)

PTA2/KBIP2/TCLK/RESET/VPP (1),( 2)

PTA3/ACMPO/BKGD/MS

ANALOG COMPARATOR

MODULE

MODULO TIMER

MODULE

PTA4/KBIP4 (1),(3)

PTA5/KBIP5 (1), (3)

INTERNAL REGULATOR

(KBI)

TCLK

ACMP-

ACMP+

ACMPO

(ICS)

(ACMP)

(MTIM)

USER FLASH

SC9RS08KA2 — 2048 BYTES

SC9RS08KA1 — 1024 BYTES

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