SC9RS08KA2 datasheet(33/134 Pages) FREESCALE

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Chapter 4 Memory

SC9RS08KA2 Series Data Sheet, Rev. 1

Freescale Semiconductor

4.7.2

Flash Control Register (FLCR)

4.8

Page Select Register (PAGESEL)

There is a 64-byte window ($00C0–$00FF) in the direct-page reserved for paging access. Programming

the page select register determines the corresponding 64-byte block on the memory map for direct-page

access. For example, when the PAGESEL register is programmed with value $08, the high page registers

($0200–$023F) can be accessed through the paging window ($00C0–$00FF) via direct addressing mode

instructions.

765

432

000

HVEN

MASS

PGM1

Reset

000

= Unimplemented or Reserved

Figure 4-4. Flash Control Register (FLCR)

Table 4-3. FLCR Field Descriptions

Field

Description

HVEN

High Voltage Enable — This read/write bit enables high voltages to the Flash array for program and erase

operations. HVEN can be set only if either PGM = 1 or MASS = 1 and the proper sequence for program or erase

is followed.

0 High voltage disabled to array.

1 High voltage enabled to array.

MASS

Mass Erase Control Bit — This read/write bit configures the memory for mass erase operation.

0 Mass erase operation not selected.

1 Mass erase operation selected.

PGM1

1 When Flash security is engaged, writing to PGM bit has no effect. As a result, Flash programming is not allowed.

Program Control Bit — This read/write bit configures the memory for program operation. PGM is interlocked

with the MASS bit such that both bits cannot be equal to 1 or set to 1 at the same time.

0 Program operation not selected.

1 Program operation selected.

765

432

AD13

AD12

AD11

AD10

AD9

AD8

AD7

AD6

Reset

000

100

Figure 4-5. Page Select Register (PAGESEL)

Table 4-4. PAGESEL Field Descriptions

Field

Description

7:0

AD[13:6]

Page Selector— These bits define the address line bit 6 to bit 13, which determines the 64-byte block boundary

of the memory block accessed via the direct page window. See Figure 4-6 and Table 4-5.

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